Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752106AbcCBGJN (ORCPT ); Wed, 2 Mar 2016 01:09:13 -0500 Received: from mail-cys01nam02on0062.outbound.protection.outlook.com ([104.47.37.62]:19904 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751878AbcCBGJG convert rfc822-to-8bit (ORCPT ); Wed, 2 Mar 2016 01:09:06 -0500 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Anurag Kumar Vulisha To: Rob Herring CC: Arnd Bergmann , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "tj@kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-ide@vger.kernel.org" , Anirudha Sarangi , Srikanth Vemula , "Punnaiah Choudary Kalluri" , Michal Simek Subject: RE: [RFC PATCH] drivers: ata: Read Rx water mark value from device-tree Thread-Topic: [RFC PATCH] drivers: ata: Read Rx water mark value from device-tree Thread-Index: AQHRa+E25y/A5qQ2vUGiWO6JIFkWzZ80/+iAgALeGiD//80DgIAAikawgAC0egCAAK+aQP//6dgAgATSeACAB17F4A== Date: Wed, 2 Mar 2016 05:53:18 +0000 Message-ID: <3802E9A6666DF54886E2B9CBF743BA9825E025F6@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1455974302-7082-1-git-send-email-anuragku@xilinx.com> <18251200.Xfr10N5eWq@wuerfel> <3802E9A6666DF54886E2B9CBF743BA9825E01009@XAP-PVEXMBX01.xlnx.xilinx.com> <8540232.vQE3WQTD95@wuerfel> <3802E9A6666DF54886E2B9CBF743BA9825E0117F@XAP-PVEXMBX01.xlnx.xilinx.com> <20160223192942.GA6235@rob-hp-laptop> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.23.97.79] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22160.006 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(24454002)(164054003)(189002)(377454003)(199003)(13464003)(76176999)(46406003)(106116001)(2906002)(97756001)(50466002)(2900100001)(107886002)(5004730100002)(54356999)(63266004)(50986999)(6806005)(5890100001)(110136002)(2920100001)(81156009)(5250100002)(106466001)(93886004)(5001960100004)(19580405001)(19580395003)(33656002)(5003600100002)(5008740100001)(189998001)(4326007)(87936001)(586003)(55846006)(23726003)(102836003)(47776003)(92566002)(6116002)(11100500001)(86362001)(1096002)(1220700001)(4001430100002)(3846002)(107986001);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1NAM02HT161;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;MLV:sfv;MX:1;A:1;LANG:en; X-MS-Office365-Filtering-Correlation-Id: 33c3ca92-482f-4909-ca91-08d3425ef6bb X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:SN1NAM02HT161; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(5005006)(13018025)(8121501046)(13017025)(13015025)(13023025)(13024025)(10201501046)(3002001);SRVR:SN1NAM02HT161;BCL:0;PCL:0;RULEID:;SRVR:SN1NAM02HT161; X-Forefront-PRVS: 086943A159 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2016 05:53:21.8995 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT161 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 5341 Lines: 115 + Michal > -----Original Message----- > From: Anurag Kumar Vulisha > Sent: Friday, February 26, 2016 7:18 PM > To: 'Rob Herring' > Cc: Arnd Bergmann; pawel.moll@arm.com; mark.rutland@arm.com; > ijc+devicetree@hellion.org.uk; galak@codeaurora.org; tj@kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux- > ide@vger.kernel.org; Anirudha Sarangi; Srikanth Vemula; Punnaiah Choudary > Kalluri > Subject: RE: [RFC PATCH] drivers: ata: Read Rx water mark value from device- > tree > > Hi Rob, > > > -----Original Message----- > > From: Rob Herring [mailto:robh@kernel.org] > > Sent: Wednesday, February 24, 2016 1:00 AM > > To: Anurag Kumar Vulisha > > Cc: Arnd Bergmann; pawel.moll@arm.com; mark.rutland@arm.com; > > ijc+devicetree@hellion.org.uk; galak@codeaurora.org; tj@kernel.org; > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux- > > ide@vger.kernel.org; Anirudha Sarangi; Srikanth Vemula; Punnaiah > > Choudary Kalluri > > Subject: Re: [RFC PATCH] drivers: ata: Read Rx water mark value from > > device- tree > > > > On Tue, Feb 23, 2016 at 03:29:55PM +0000, Anurag Kumar Vulisha wrote: > > > Hi Arnd, > > > > > > > -----Original Message----- > > > > From: Arnd Bergmann [mailto:arnd@arndb.de] > > > > Sent: Tuesday, February 23, 2016 3:51 PM > > > > To: Anurag Kumar Vulisha > > > > Cc: robh+dt@kernel.org; pawel.moll@arm.com; > mark.rutland@arm.com; > > > > ijc+devicetree@hellion.org.uk; galak@codeaurora.org; > > > > ijc+tj@kernel.org; > > > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux- > > > > ide@vger.kernel.org; Anirudha Sarangi; Srikanth Vemula; Punnaiah > > > > Choudary Kalluri > > > > Subject: Re: [RFC PATCH] drivers: ata: Read Rx water mark value > > > > from > > > > device- tree > > > > > > > > On Tuesday 23 February 2016 05:58:32 Anurag Kumar Vulisha wrote: > > > > > > > > > > > > I don't know what is appropriate because I have no idea what > > > > > > Rxwatermark is good for. Can you try describing why we can't > > > > > > just set it to the correct value for everyone automatically? > > > > > > > > > > > > > > > > This RX watermark level sets the minimum number of free > > > > > locations within the RX FIFO .When the rx fifo level crosses the > > > > > programmed watermark level ,sata controller will transmit HOLDS > > > > > to the device asking it > > > > to wait. This happens when dma reads the rx fifo data slower than > > > > the device is sending the data. Note that it can take some time > > > > for the HOLDs to get to the other end and in the time there must > > > > be enough room in the FIFO to absorb all data that could arrive > > > > from the > > device. > > > > > Currently we are using 0x40 for this value, which works fine > > > > > with all hardware designs we are currently having. But hoping > > > > > that this value may vary for future silicon versions, I wanted > > > > > to make this as a configurable > > > > value. So for this reason I thought of moving it either to > > > > device-tree or making it as a module_param() property. > > > > > > > > > > > > > Ok, so if this depends on the silicon version, your initial > > > > approach would be better than the module_param. > > > > > > > > I would probably make this dependent on the compatible string > > > > instead, and have a table in the device driver that uses a > > > > specific value for each variant of the device, but either way should be > fine. > > > > > > > > Having a separate property is most appropriate if for each > > > > hardware revision there is exactly one ideal value, while a table > > > > in the driver makes more sense if this takes a bit of tuning and > > > > the driver might choose to optimize it differently based on other > > > > constraints, such as its own interrupt handler implementation. > > > > > > > > > > Since we are currently having one value in common for all the > > > hardware and also changing the rx water mark does not require any > > > changes other than vendor specific PTC register update , I think it > > > would be better to use device tree property for that rx watermark > value. > > Doing this makes the updating of rx watermark value easy, if any > > changes required. > > > > > > In future, if any silicon version rx water mark value doesn't work > > > with the current versions, then I will do as you said by > > > maintaining the table in device driver. But at present I feel that > > > single rx watermark property in device tree would be enough, since > > > it works with all > > the hardware versions we have. > > > > If you currently have no reason to modify it now, then add it later > > when you actually have a use case. > > > > This property may vary from board to board . It also depends on the phy > reference clock frequency which can be changed based on use case. So > moving this property to device tree will make it easy for the user to > configure this property based on the requirement. > > Thanks, > Anuarg Kumar V This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.