Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754889AbcCBKyy (ORCPT ); Wed, 2 Mar 2016 05:54:54 -0500 Received: from mail.skyhub.de ([78.46.96.112]:57967 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754809AbcCBKyw (ORCPT ); Wed, 2 Mar 2016 05:54:52 -0500 Date: Wed, 2 Mar 2016 11:54:46 +0100 From: Borislav Petkov To: Aravind Gopalakrishnan Cc: tony.luck@intel.com, hpa@zytor.com, mingo@redhat.com, tglx@linutronix.de, dougthompson@xmission.com, mchehab@osg.samsung.com, x86@kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, gong.chen@linux.intel.com, len.brown@intel.com, peterz@infradead.org, ak@linux.intel.com, alexander.shishkin@linux.intel.com Subject: [PATCH 3/3] EDAC, mce_amd: Correct error paths Message-ID: <20160302105445.GF16954@pd.tnic> References: <1456785179-14378-1-git-send-email-Aravind.Gopalakrishnan@amd.com> <1456785179-14378-3-git-send-email-Aravind.Gopalakrishnan@amd.com> <20160302105032.GC16954@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20160302105032.GC16954@pd.tnic> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4533 Lines: 153 From: Borislav Petkov Date: Wed, 2 Mar 2016 11:46:58 +0100 Subject: [PATCH 3/3] EDAC, mce_amd: Correct error paths We need to unwind properly when we fail to find the proper decoding functions. Streamline error messages to resemble the rest of this file, while at it and do some minor stylistic changes. Signed-off-by: Borislav Petkov --- drivers/edac/mce_amd.c | 38 +++++++++++++++++++++----------------- 1 file changed, 21 insertions(+), 17 deletions(-) diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index 0f9953cbde4e..81495a360eea 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -833,7 +833,7 @@ static void decode_f17h_core_errors(const char *ip_name, u8 xec, unsigned int mc len = ARRAY_SIZE(f17h_ls_mce_desc) - 1; if (xec == 0x4) { - pr_cont("Unrecognized error code from LS MCA bank\n"); + pr_cont("Unrecognized LS MCA error code.\n"); return; } break; @@ -869,12 +869,12 @@ static void decode_f17h_core_errors(const char *ip_name, u8 xec, unsigned int mc break; default: - pr_cont("Unrecognized Mca Type value for F17h Core. Unable to decode errors\n"); + pr_cont("Corrupted MCA Core info.\n"); return; } if (xec > len) { - pr_cont("Unrecognized error code from %s MCA bank\n", amd_hwids[mca_type].name); + pr_cont("Unrecognized %s MCA bank error code.\n", amd_hwids[mca_type].name); return; } @@ -900,12 +900,12 @@ static void decode_df_errors(u8 xec, unsigned int mca_type) break; default: - pr_cont("Unrecognized Mca Type value for DF. Unable to decode errors\n"); + pr_cont("Corrupted MCA Data Fabric info.\n"); return; } if (xec > len) { - pr_cont("Unrecognized error code from %s MCA bank\n", amd_hwids[mca_type].name); + pr_cont("Unrecognized %s MCA bank error code.\n", amd_hwids[mca_type].name); return; } @@ -915,12 +915,12 @@ static void decode_df_errors(u8 xec, unsigned int mca_type) /* Decode errors according to Scalable MCA specification */ static void decode_smca_errors(struct mce *m) { - u32 low, high; u32 addr = MSR_AMD64_SMCA_MCx_IPID(m->bank); unsigned int hwid, mca_type, i; u8 xec = XEC(m->status, xec_mask); const char * const *error_desc_array; const char *ip_name; + u32 low, high; size_t len; if (rdmsr_safe(addr, &low, &high)) { @@ -934,10 +934,8 @@ static void decode_smca_errors(struct mce *m) pr_emerg(HW_ERR "MC%d IPID value: 0x%08x%08x\n", m->bank, high, low); /* - * Based on hwid and mca_type values, - * decode errors from respective IPs. - * Note: mca_type values make sense only - * in the context of an hwid + * Based on hwid and mca_type values, decode errors from respective IPs. + * Note: mca_type values make sense only in the context of a hwid. */ for (i = 0; i < ARRAY_SIZE(amd_hwids); i++) if (amd_hwids[i].hwid == hwid) @@ -976,7 +974,7 @@ static void decode_smca_errors(struct mce *m) break; default: - pr_emerg(HW_ERR "HWID:%d does not match any existing IPs\n", hwid); + pr_emerg(HW_ERR "HWID:%d does not match any existing IPs.\n", hwid); return; } @@ -985,7 +983,7 @@ static void decode_smca_errors(struct mce *m) pr_emerg(HW_ERR "%s Error: ", ip_name); if (xec > len) { - pr_cont("Unrecognized error code from %s MCA bank\n", ip_name); + pr_cont("Unrecognized %s MCA bank error code.\n", ip_name); return; } @@ -1151,7 +1149,7 @@ static struct notifier_block amd_mce_dec_nb = { static int __init mce_amd_init(void) { struct cpuinfo_x86 *c = &boot_cpu_data; - u32 ebx = cpuid_ebx(0x80000007); + u32 ebx; if (c->x86_vendor != X86_VENDOR_AMD) return -ENODEV; @@ -1207,17 +1205,18 @@ static int __init mce_amd_init(void) break; case 0x17: + ebx = cpuid_ebx(0x80000007); xec_mask = 0x3f; + if (!(ebx & BIT(3))) { - printk(KERN_WARNING "Decoding supported only on Scalable MCA enabled processors\n"); - return 0; + printk(KERN_WARNING "Decoding supported only on Scalable MCA processors.\n"); + goto err_out; } break; default: printk(KERN_WARNING "Huh? What family is it: 0x%x?!\n", c->x86); - kfree(fam_ops); - fam_ops = NULL; + goto err_out; } pr_info("MCE: In-kernel MCE decoding enabled.\n"); @@ -1225,6 +1224,11 @@ static int __init mce_amd_init(void) mce_register_decode_chain(&amd_mce_dec_nb); return 0; + +err_out: + kfree(fam_ops); + fam_ops = NULL; + return -EINVAL; } early_initcall(mce_amd_init); -- 2.3.5 -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply.