Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932347AbcCCII3 (ORCPT ); Thu, 3 Mar 2016 03:08:29 -0500 Received: from regular1.263xmail.com ([211.150.99.130]:39174 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753236AbcCCII1 (ORCPT ); Thu, 3 Mar 2016 03:08:27 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: zhangqing@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zhangqing@rock-chips.com X-UNIQUE-TAG: <5e03b7deadb29736073fc16629ea831d> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Elaine Zhang To: heiko@sntech.de, khilman@baylibre.com, wxt@rock-chips.com Cc: linux-arm-kernel@lists.infradead.org, huangtao@rock-chips.com, zyw@rock-chips.com, xxx@rock-chips.com, jay.xu@rock-chips.com, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Elaine Zhang Subject: [PATCH v5 4/6] dt/bindings: power: add RK3399 SoCs header for power-domain Date: Thu, 3 Mar 2016 16:03:51 +0800 Message-Id: <1456992233-25164-5-git-send-email-zhangqing@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456992233-25164-1-git-send-email-zhangqing@rock-chips.com> References: <1456992233-25164-1-git-send-email-zhangqing@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1770 Lines: 70 According to a description from TRM, add all the power domains Signed-off-by: Elaine Zhang --- include/dt-bindings/power/rk3399-power.h | 53 ++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 include/dt-bindings/power/rk3399-power.h diff --git a/include/dt-bindings/power/rk3399-power.h b/include/dt-bindings/power/rk3399-power.h new file mode 100644 index 0000000..69fbd67 --- /dev/null +++ b/include/dt-bindings/power/rk3399-power.h @@ -0,0 +1,53 @@ +#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__ +#define __DT_BINDINGS_POWER_RK3399_POWER_H__ + +/* VD_CORE_L */ +#define RK3399_PD_A53_L0 0 +#define RK3399_PD_A53_L1 1 +#define RK3399_PD_A53_L2 2 +#define RK3399_PD_A53_L3 3 +#define RK3399_PD_SCU_L 4 + +/* VD_CORE_B */ +#define RK3399_PD_A72_B0 5 +#define RK3399_PD_A72_B1 6 +#define RK3399_PD_SCU_B 7 + +/* VD_CENTER */ +#define RK3399_PD_CENTER 8 +#define RK3399_PD_VCODEC 9 +#define RK3399_PD_RGA 10 +#define RK3399_PD_IEP 11 +#define RK3399_PD_VDU 12 + +/* VD_LOGIC */ +#define RK3399_PD_PERILP 13 +#define RK3399_PD_PERIHP 14 +#define RK3399_PD_VIO 15 +#define RK3399_PD_VO 16 +#define RK3399_PD_VOPB 17 +#define RK3399_PD_VOPL 18 +#define RK3399_PD_ISP0 19 +#define RK3399_PD_ISP1 20 +#define RK3399_PD_HDCP 21 +#define RK3399_PD_TCPD0 22 +#define RK3399_PD_TCPD1 23 +#define RK3399_PD_GIC 24 +#define RK3399_PD_ALIVE 25 +#define RK3399_PD_USB3 26 +#define RK3399_PD_SD 27 +#define RK3399_PD_CCI 28 +#define RK3399_PD_CCI0 29 +#define RK3399_PD_CCI1 30 +#define RK3399_PD_GMAC 31 +#define RK3399_PD_EMMC 32 +#define RK3399_PD_EDP 33 +#define RK3399_PD_SDIOAUDIO 34 + +/* VD_GPU */ +#define RK3399_PD_GPU 35 + +/* VD_PMU */ +#define RK3399_PD_PMU 36 + +#endif -- 1.9.1