Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751329AbcCFKEn (ORCPT ); Sun, 6 Mar 2016 05:04:43 -0500 Received: from mail-lb0-f179.google.com ([209.85.217.179]:36571 "EHLO mail-lb0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751145AbcCFKEe (ORCPT ); Sun, 6 Mar 2016 05:04:34 -0500 From: Alexander Kochetkov To: Mark Brown , Heiko Stuebner Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alexander Kochetkov Subject: [PATCH] spi/rockchip: fix endian mode for 16-bit transfers Date: Sun, 6 Mar 2016 13:04:17 +0300 Message-Id: <1457258657-19154-1-git-send-email-al.kochet@gmail.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 722 Lines: 23 16-bit transfers must be in big endian mode on wire. Signed-off-by: Alexander Kochetkov --- drivers/spi/spi-rockchip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index aa9561f..ef77df7 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -510,7 +510,8 @@ static void rockchip_spi_config(struct rockchip_spi *rs) int rsd = 0; u32 cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET) - | (CR0_SSD_ONE << CR0_SSD_OFFSET); + | (CR0_SSD_ONE << CR0_SSD_OFFSET) + | (CR0_EM_BIG << CR0_EM_OFFSET); cr0 |= (rs->n_bytes << CR0_DFS_OFFSET); cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET); -- 1.7.9.5