Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752366AbcCGIpM (ORCPT ); Mon, 7 Mar 2016 03:45:12 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:10588 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752026AbcCGIpI convert rfc822-to-8bit (ORCPT ); Mon, 7 Mar 2016 03:45:08 -0500 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 07 Mar 2016 00:43:50 -0800 Message-ID: <56DD3F9C.3000700@nvidia.com> Date: Mon, 7 Mar 2016 16:45:16 +0800 From: Wei Ni User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Thierry Reding CC: , , , , , Subject: Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature References: <1456739480-3304-1-git-send-email-wni@nvidia.com> <20160307083842.GC31189@ulmo.nvidia.com> In-Reply-To: <20160307083842.GC31189@ulmo.nvidia.com> X-Originating-IP: [10.19.224.146] X-ClientProxiedBy: HKMAIL103.nvidia.com (10.18.16.12) To HKMAIL101.nvidia.com (10.18.16.10) Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1299 Lines: 41 On 2016年03月07日 16:38, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Mon, Feb 29, 2016 at 05:51:20PM +0800, Wei Ni wrote: >> The sign bit of temperature readback is bit 0, not bit 1. >> Change to BIT(0) to fix it. >> >> Signed-off-by: Wei Ni >> --- >> drivers/thermal/tegra_soctherm.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c >> index 74ea5765938b..136975220c92 100644 >> --- a/drivers/thermal/tegra_soctherm.c >> +++ b/drivers/thermal/tegra_soctherm.c >> @@ -57,7 +57,7 @@ >> #define READBACK_VALUE_MASK 0xff00 >> #define READBACK_VALUE_SHIFT 8 >> #define READBACK_ADD_HALF BIT(7) >> -#define READBACK_NEGATE BIT(1) >> +#define READBACK_NEGATE BIT(0) > > I haven't found this documented anywhere. The register documentation > indicates that the SOC_THERM_TSENSOR_TEMP1 and SOC_THERM_TSENSOR_TEMP2 > registers are in some kind of "temp readback format", but I can't find > any specification of that format. Can you point me at the source for > this information and file an internal bug report so that we can get > the documentation updated? Sure, I will do it. Thanks for your comment. > > Thierry > > * Unknown Key > * 0x7F3EB3A1 >