Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753322AbcCGPMG (ORCPT ); Mon, 7 Mar 2016 10:12:06 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:34117 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753187AbcCGPL0 (ORCPT ); Mon, 7 Mar 2016 10:11:26 -0500 From: Jan Glauber To: Wolfram Sang Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, David Daney , David Daney , Jan Glauber Subject: [PATCH v3 11/14] i2c-octeon: Add workaround for broken irqs on CN3860 Date: Mon, 7 Mar 2016 16:10:54 +0100 Message-Id: <20fb6eb5fbc0384f51a7e2972d903c981a65f545.1457362545.git.jglauber@cavium.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2964 Lines: 96 From: David Daney CN3860 does not interrupt the CPU when the i2c status changes. If we get a timeout, and see the status has in fact changed, we know we have this problem, and drop back to polling. Signed-off-by: David Daney Signed-off-by: Jan Glauber --- drivers/i2c/busses/i2c-octeon.c | 46 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c index afca316..6868802 100644 --- a/drivers/i2c/busses/i2c-octeon.c +++ b/drivers/i2c/busses/i2c-octeon.c @@ -112,6 +112,7 @@ struct octeon_i2c { void __iomem *twsi_base; struct device *dev; bool hlc_enabled; + bool broken_irq_mode; void (*int_en)(struct octeon_i2c *); void (*int_dis)(struct octeon_i2c *); void (*hlc_int_en)(struct octeon_i2c *); @@ -378,10 +379,33 @@ static int octeon_i2c_wait(struct octeon_i2c *i2c) long time_left; int first = 1; + if (i2c->broken_irq_mode) { + /* + * Some chip revisions seem to not assert the irq in + * the interrupt controller. So we must poll for the + * IFLG change. + */ + u64 end = get_jiffies_64() + i2c->adap.timeout; + + while (!octeon_i2c_test_iflg(i2c) && + time_before64(get_jiffies_64(), end)) + udelay(50); + + return octeon_i2c_test_iflg(i2c) ? 0 : -ETIMEDOUT; + } + i2c->int_en(i2c); time_left = wait_event_timeout(i2c->queue, poll_iflg(i2c, &first), i2c->adap.timeout); i2c->int_dis(i2c); + + if (time_left <= 0 && OCTEON_IS_MODEL(OCTEON_CN38XX) && + octeon_i2c_test_iflg(i2c)) { + dev_err(i2c->dev, + "broken irq connection detected, switching to polling mode.\n"); + i2c->broken_irq_mode = true; + return 0; + } if (!time_left) { dev_dbg(i2c->dev, "%s: timeout\n", __func__); return -ETIMEDOUT; @@ -516,6 +540,21 @@ static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c) { int result; + if (i2c->broken_irq_mode) { + /* + * Some cn38xx boards did not assert the irq in + * the interrupt controller. So we must poll for the + * IFLG change. + */ + u64 end = get_jiffies_64() + i2c->adap.timeout; + + while (!octeon_i2c_hlc_test_ready(i2c) && + time_before64(get_jiffies_64(), end)) + udelay(50); + + return octeon_i2c_hlc_test_ready(i2c) ? 0 : -ETIMEDOUT; + } + i2c->hlc_int_en(i2c); result = wait_event_interruptible_timeout(i2c->queue, octeon_i2c_hlc_test_ready(i2c), @@ -523,6 +562,13 @@ static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c) i2c->hlc_int_dis(i2c); if (!result) octeon_i2c_hlc_int_clear(i2c); + if (result <= 0 && OCTEON_IS_MODEL(OCTEON_CN38XX) && + octeon_i2c_hlc_test_ready(i2c)) { + dev_err(i2c->dev, "broken irq connection detected, switching to polling mode.\n"); + i2c->broken_irq_mode = true; + return 0; + } + if (result < 0) { dev_dbg(i2c->dev, "%s: wait interrupted\n", __func__); return result; -- 1.9.1