Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932531AbcCGXqC (ORCPT ); Mon, 7 Mar 2016 18:46:02 -0500 Received: from mail.linuxfoundation.org ([140.211.169.12]:44065 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933431AbcCGXpb (ORCPT ); Mon, 7 Mar 2016 18:45:31 -0500 From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Timothy Pearson , Dave Airlie Subject: [PATCH 3.10 05/24] drm/ast: Fix incorrect register check for DRAM width Date: Mon, 7 Mar 2016 15:45:07 -0800 Message-Id: <20160307234351.324793040@linuxfoundation.org> X-Mailer: git-send-email 2.7.2 In-Reply-To: <20160307234350.601613335@linuxfoundation.org> References: <20160307234350.601613335@linuxfoundation.org> User-Agent: quilt/0.64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1047 Lines: 34 3.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Timothy Pearson commit 2d02b8bdba322b527c5f5168ce1ca10c2d982a78 upstream. During DRAM initialization on certain ASpeed devices, an incorrect bit (bit 10) was checked in the "SDRAM Bus Width Status" register to determine DRAM width. Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05. Signed-off-by: Timothy Pearson Signed-off-by: Dave Airlie Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/ast/ast_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -124,7 +124,7 @@ static int ast_get_dram_info(struct drm_ } while (ast_read32(ast, 0x10000) != 0x01); data = ast_read32(ast, 0x10004); - if (data & 0x400) + if (data & 0x40) ast->dram_bus_width = 16; else ast->dram_bus_width = 32;