Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754251AbcCHAvK (ORCPT ); Mon, 7 Mar 2016 19:51:10 -0500 Received: from mail-lb0-f176.google.com ([209.85.217.176]:35717 "EHLO mail-lb0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753920AbcCHAu7 (ORCPT ); Mon, 7 Mar 2016 19:50:59 -0500 MIME-Version: 1.0 In-Reply-To: References: <4687430.mfM0GbdeDL@skinner> <16028318.H9OZ9hFYY1@skinner> <11753995.6ynq8tUiQx@vostro.rjw.lan> <1770444.1VxdmEr8lv@skinner> Date: Mon, 7 Mar 2016 19:50:57 -0500 X-Google-Sender-Auth: u_Itn2ZzUELCMHBejcls18OeH-M Message-ID: Subject: Re: [PATCH] Do not modify MSR_IA32_ENERGY_PERF_BIAS in kernel From: Len Brown To: "Rafael J. Wysocki" Cc: Thomas Renninger , "Rafael J. Wysocki" , Ingo Molnar , X86 ML , Linux Kernel Mailing List , "linux-pm@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 361 Lines: 11 > But with Broadwell-EP processor (E5-2687W v4) the CPU will not enter turbo modes > if this value is not set to performance BDX-EP supports HWP. Are these failing machines running in HWP mode? (On BDX-EP, and only on BDX-EP, EPB acts to set the BIAS for HWP, because that processor doesn't yet have EPP.) -- Len Brown, Intel Open Source Technology Center