Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754094AbcCHHwZ (ORCPT ); Tue, 8 Mar 2016 02:52:25 -0500 Received: from down.free-electrons.com ([37.187.137.238]:35366 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753905AbcCHHwU (ORCPT ); Tue, 8 Mar 2016 02:52:20 -0500 Date: Tue, 8 Mar 2016 08:51:31 +0100 From: Maxime Ripard To: Vinod Koul Cc: Boris Brezillon , Dan Williams , dmaengine@vger.kernel.org, Chen-Yu Tsai , linux-sunxi@googlegroups.com, Emilio =?iso-8859-1?Q?L=F3pez?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] dma: sun4i: expose block size and wait cycle configuration to DMA users Message-ID: <20160308075131.GE8418@lukather> References: <1457344771-12946-1-git-send-email-boris.brezillon@free-electrons.com> <20160307145429.GG11154@localhost> <20160307160857.577bb04d@bbrezillon> <20160307203024.GD8418@lukather> <20160308025547.GI11154@localhost> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="y06s9PvpQ1Ch5mdL" Content-Disposition: inline In-Reply-To: <20160308025547.GI11154@localhost> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3416 Lines: 86 --y06s9PvpQ1Ch5mdL Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Mar 08, 2016 at 08:25:47AM +0530, Vinod Koul wrote: > On Mon, Mar 07, 2016 at 09:30:24PM +0100, Maxime Ripard wrote: > > On Mon, Mar 07, 2016 at 04:08:57PM +0100, Boris Brezillon wrote: > > > Hi Vinod, > > >=20 > > > On Mon, 7 Mar 2016 20:24:29 +0530 > > > Vinod Koul wrote: > > >=20 > > > > On Mon, Mar 07, 2016 at 10:59:31AM +0100, Boris Brezillon wrote: > > > > > +/* Dedicated DMA parameter register layout */ > > > > > +#define SUN4I_DDMA_PARA_DST_DATA_BLK_SIZE(n) (((n) - 1) << 24) > > > > > +#define SUN4I_DDMA_PARA_DST_WAIT_CYCLES(n) (((n) - 1) << 16) > > > > > +#define SUN4I_DDMA_PARA_SRC_DATA_BLK_SIZE(n) (((n) - 1) << 8) > > > > > +#define SUN4I_DDMA_PARA_SRC_WAIT_CYCLES(n) (((n) - 1) << 0) > > > > > + > > > > > +/** > > > > > + * struct sun4i_dma_chan_config - DMA channel config > > > > > + * > > > > > + * @para: contains information about block size and time before = checking > > > > > + * DRQ line. This is device specific and only applicable to de= dicated > > > > > + * DMA channels > > > >=20 > > > > What information, can you elobrate.. And why can't you use existing > > > > dma_slave_config for this? > > >=20 > > > Block size is related to the device FIFO size. I guess it allows the > > > DMA channel to launch a transfer of X bytes without having to check t= he > > > DRQ line (the line telling the DMA engine it can transfer more data > > > to/from the device). The wait cycles information is apparently related > > > to the number of clks the engine should wait before polling/checking > > > the DRQ line status between each block transfer. I'm not sure what it > > > saves to put WAIT_CYCLES() to something !=3D 1, but in their BSP, > > > Allwinner tweak that depending on the device. >=20 > we already have block size aka src/dst_maxburst, why not use that one. I'm not sure it's really the same thing. The DMA controller also has a burst parameter, that is either 1 byte or 8 bytes, and ends up being different from this one. > Why does dmaengine need to wait? Can you explain that We have no idea, we thought you might have one :) It doesn't really makes sense to us, but it does have a significant impact on the throughput. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --y06s9PvpQ1Ch5mdL Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJW3oSDAAoJEBx+YmzsjxAgdGoP+wWQS7I7xFfHpsLDVjiwMFCg DRbvWu84IPAcfBKy2ZuoUWksRHnRcpgn41Vgwi2j7sOssqUeAExZIQYclWYb6TAq GBVRq9dNJSZfxDKdA7PdmN1FosbQjyDi4u+EWNIdZphv9yKRCTjXsLcOq0RelB3W bF5kG1LXdELJH60YG+GhUp/hpA8BhZtLKsP7hfNpcPFZtx/lqnko0M35jyxulPZo huq4yHiJLmWv5peLk+MP0pStcPoFuKy91Ng4ssktcI1pd5SS/vOY2yXiB9sZgdte ++qSjlH5oymcPU2kmOL97QVU2ahHZ4kkqXliKCHQ+lFpdm13YPP1huxvSBue/h3d iJkgP3vpzvrOgPGbquLiE1lr3IWp9BI/BozAJzKtA80Eu+54i77LU1jBRdZ43xdA 94uB1xMYOpDlcFL63liW+ncteGjEWgsWDryxVRFSorntWeZe1demuoGjdjqvF1KR 8xmwqLPZ/kPIALE66hDaNdBmURc14rpaItzCqyWZriXmLr64CeYg2VTC8RGWFk1I VzxECl/E+Fh7lCQDOvbvbcvEpf7hhENCKV+GNQFn2Lk4061lT+xpzqH3sOeVxVZZ Jt9yp3AE41ZQtRHX1uEso6RLy9idjZkwdV0U6jH4SzXuKt8df5xHX91uvw6DSo1E gU0rTx6W6GOJNz/vBKah =vUaD -----END PGP SIGNATURE----- --y06s9PvpQ1Ch5mdL--