Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754094AbcCIWAW (ORCPT ); Wed, 9 Mar 2016 17:00:22 -0500 Received: from mga11.intel.com ([192.55.52.93]:14324 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754082AbcCIWAL (ORCPT ); Wed, 9 Mar 2016 17:00:11 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,312,1455004800"; d="scan'208";a="63107464" Subject: [PATCH 1/9] x86, pkeys: Documentation To: linux-kernel@vger.kernel.org Cc: Dave Hansen , dave.hansen@linux.intel.com From: Dave Hansen Date: Wed, 09 Mar 2016 14:00:09 -0800 References: <20160309220008.D61AF421@viggo.jf.intel.com> In-Reply-To: <20160309220008.D61AF421@viggo.jf.intel.com> Message-Id: <20160309220009.8F33CBCB@viggo.jf.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1988 Lines: 46 From: Dave Hansen Give a high-level overview of Protection Keys from a hardware perspective, as well as some description since we referred to this from the Kconfig text. Signed-off-by: Dave Hansen --- b/Documentation/x86/protection-keys.txt | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff -puN /dev/null Documentation/x86/protection-keys.txt --- /dev/null 2016-03-01 16:49:31.662341041 -0800 +++ b/Documentation/x86/protection-keys.txt 2016-03-09 13:55:19.273412780 -0800 @@ -0,0 +1,28 @@ +Memory Protection Keys for User pages is a CPU feature which will +first appear on Skylake Servers, but will also be supported on +future non-server parts. + +Memory Protection Keys provides a mechanism for enforcing page-based +protections, but without requiring modification of the page tables +when an application changes protection domains. It works by +dedicating 4 previously ignored bits in each page table entry to a +"protection key", giving 16 possible keys. + +There is also a new user-accessible register (PKRU) with two separate +bits (Access Disable and Write Disable) for each key. Being a CPU +register, PKRU is inherently thread-local, potentially giving each +thread a different set of protections from every other thread. + +There are two new instructions (RDPKRU/WRPKRU) for reading and writing +to the new register. The feature is only available in 64-bit mode, +even though there is theoretically space in the PAE PTEs. These +permissions are enforced on data access only and have no effect on +instruction fetches. + +=========================== Config Option =========================== + +This config option adds approximately 1.5kb of text. and 50 bytes of +data to the executable. A workload which does large O_DIRECT reads +of holes in XFS files was run to exercise get_user_pages_fast(). No +performance delta was observed with the config option +enabled or disabled. _