Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751238AbcCKJqF (ORCPT ); Fri, 11 Mar 2016 04:46:05 -0500 Received: from down.free-electrons.com ([37.187.137.238]:60670 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750833AbcCKJp4 (ORCPT ); Fri, 11 Mar 2016 04:45:56 -0500 Date: Fri, 11 Mar 2016 10:45:52 +0100 From: Boris Brezillon To: Vinod Koul Cc: Maxime Ripard , Dan Williams , dmaengine@vger.kernel.org, Chen-Yu Tsai , linux-sunxi@googlegroups.com, Emilio =?UTF-8?B?TMOzcGV6?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] dma: sun4i: expose block size and wait cycle configuration to DMA users Message-ID: <20160311104552.23e06a16@bbrezillon> In-Reply-To: <20160311062607.GP11154@localhost> References: <1457344771-12946-1-git-send-email-boris.brezillon@free-electrons.com> <20160307145429.GG11154@localhost> <20160307160857.577bb04d@bbrezillon> <20160307203024.GD8418@lukather> <20160308025547.GI11154@localhost> <20160309120627.67612b1d@bbrezillon> <20160311062607.GP11154@localhost> X-Mailer: Claws Mail 3.12.0 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1219 Lines: 32 On Fri, 11 Mar 2016 11:56:07 +0530 Vinod Koul wrote: > On Wed, Mar 09, 2016 at 12:06:27PM +0100, Boris Brezillon wrote: > > On Tue, 8 Mar 2016 08:25:47 +0530 > > Vinod Koul wrote: > > > > > > Why does dmaengine need to wait? Can you explain that > > > > I don't have an answer for that one, but when I set WAIT_CYCLES to 1 > > for the NAND use case it does not work. So I guess it is somehow > > related to how the DRQ line is controlled on the device side... > > Is the WAIT cycle different for different usages or same for all > usages/channels? > In Allwinner BSP they adapt it on a per slave device basis, but since DMA channels are dynamically allocated, you can't know in advance which physical channel will be attached to a specific device. Another option I considered was adding a new cell to the sun4i DT binding to encode these WAIT_CYCLES and BLOCK_SIZE information. But I'm not sure adding that to the DT is a good idea (not to mention that it would break DT ABI again, and given the last discussions on this topic, I'm not sure it's a good idea :-/). -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com