Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932606AbcCMJIr (ORCPT ); Sun, 13 Mar 2016 05:08:47 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:35746 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932537AbcCMJI3 (ORCPT ); Sun, 13 Mar 2016 05:08:29 -0400 From: Caesar Wang To: Heiko Stuebner , "David S. Miller" , Rob Herring Cc: linux-rockchip@lists.infradead.org, keescook@google.com, leozwang@google.com, sergei.shtylyov@cogentembedded.com, netdev@vger.kernel.org, Xing Zheng , Caesar Wang , Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/9] clk: rockchip: associate the rk3036 HCLK_EMAC clock-id Date: Sun, 13 Mar 2016 17:07:39 +0800 Message-Id: <1457860062-5514-7-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1457860062-5514-1-git-send-email-wxt@rock-chips.com> References: <1457860062-5514-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1156 Lines: 28 From: Xing Zheng Associate the new clock id the clock. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang --- Changes in v2: None drivers/clk/rockchip/clk-rk3036.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index 0703c8f..cc66e5f 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -408,7 +408,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { GATE(HCLK_OTG1, "hclk_otg1", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(7), 3, GFLAGS), GATE(HCLK_I2S, "hclk_i2s", "hclk_peri", 0, RK2928_CLKGATE_CON(7), 2, GFLAGS), GATE(0, "hclk_sfc", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(3), 14, GFLAGS), - GATE(0, "hclk_mac", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(3), 15, GFLAGS), + GATE(HCLK_MAC, "hclk_mac", "hclk_peri", 0, RK2928_CLKGATE_CON(3), 5, GFLAGS), /* pclk_peri gates */ GATE(0, "pclk_peri_matrix", "pclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 1, GFLAGS), -- 1.9.1