Date: Mon, 14 Mar 2016 09:34:55 +0530
From: Pratyush Anand <panand@redhat.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: David Long <dave.long@linaro.org>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will.deacon@arm.com>,
        Sandeepa Prabhu <sandeepa.s.prabhu@gmail.com>,
        William Cohen <wcohen@redhat.com>,
        Steve Capper <steve.capper@linaro.org>,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Dave P Martin <Dave.Martin@arm.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Robin Murphy <Robin.Murphy@arm.com>,
        Ard Biesheuvel <ard.biesheuvel@linaro.org>,
        Jens Wiklander <jens.wiklander@linaro.org>,
        Christoffer Dall <christoffer.dall@linaro.org>,
        Alex =?iso-8859-1?Q?Benn=E9e?= <alex.bennee@linaro.org>,
        Yang Shi <yang.shi@linaro.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Viresh Kumar <viresh.kumar@linaro.org>,
        "Suzuki K. Poulose" <suzuki.poulose@arm.com>,
        Kees Cook <keescook@chromium.org>, Zi Shen Lim <zlim.lnx@gmail.com>,
        John Blackwood <john.blackwood@ccur.com>, Feng Kan <fkan@apm.com>,
        Balamurugan Shanmugam <bshanmugam@apm.com>,
        James Morse <james.morse@arm.com>,
        Vladimir Murzin <Vladimir.Murzin@arm.com>,
        Mark Salyzyn <salyzyn@android.com>, Petr Mladek <pmladek@suse.com>,
        Andrew Morton <akpm@linux-foundation.org>,
        Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH v11 4/9] arm64: add conditional instruction simulation
 support
Message-ID: <20160314040455.GB6584@dhcppc6.redhat.com>
References: <1457501543-24197-1-git-send-email-dave.long@linaro.org>
 <1457501543-24197-5-git-send-email-dave.long@linaro.org>
 <20160313120903.54b0c8f2@arm.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20160313120903.54b0c8f2@arm.com>
User-Agent: Mutt/1.5.24 (2015-08-30)
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 860
Lines: 20

On 13/03/2016:12:09:03 PM, Marc Zyngier wrote:
> On Wed,  9 Mar 2016 00:32:18 -0500
> David Long <dave.long@linaro.org> wrote:
> 
> > +pstate_check_t * const opcode_condition_checks[16] = {
> > +	__check_eq, __check_ne, __check_cs, __check_cc,
> > +	__check_mi, __check_pl, __check_vs, __check_vc,
> > +	__check_hi, __check_ls, __check_ge, __check_lt,
> > +	__check_gt, __check_le, __check_al, __check_al
> 
> The very last entry seems wrong, or is at least the opposite of what
> the current code has. It should be something called __check_nv(), and
> always return false (condition code NEVER).

May be __check_nv() name is more appropriate as per definition, but shouldn't it
still return true, because TRM says:
"The condition code NV exists only to provide a valid disassembly of the 0b1111
encoding, otherwise its behavior is identical to AL"

~Pratyush