Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755094AbcCPDNK (ORCPT ); Tue, 15 Mar 2016 23:13:10 -0400 Received: from mga04.intel.com ([192.55.52.120]:29193 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751527AbcCPDNH (ORCPT ); Tue, 15 Mar 2016 23:13:07 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,342,1455004800"; d="scan'208";a="924996264" Date: Wed, 16 Mar 2016 08:47:21 +0530 From: Vinod Koul To: Kedareswara rao Appana Cc: dan.j.williams@intel.com, michal.simek@xilinx.com, soren.brinkmann@xilinx.com, appanad@xilinx.com, moritz.fischer@ettus.com, laurent.pinchart@ideasonboard.com, luis@debethencourt.com, anirudh@xilinx.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 4/7] dmaengine: xilinx_vdma: Add Support for Xilinx AXI Direct Memory Access Engine Message-ID: <20160316031721.GO13211@localhost> References: <1458062592-27981-1-git-send-email-appanad@xilinx.com> <1458062592-27981-5-git-send-email-appanad@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1458062592-27981-5-git-send-email-appanad@xilinx.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2303 Lines: 64 On Tue, Mar 15, 2016 at 10:53:09PM +0530, Kedareswara rao Appana wrote: > This patch updates the device-tree binding doc for > adding support for AXI DMA. Binding patch should precced the driver. and the title doesn't tell me its a binding patch and might get ignore by folks. Pls cc device tree ML on these patches. And please read Documentation/devicetree/bindings/submitting-patches.txt. Its there for a purpose > > Signed-off-by: Kedareswara rao Appana > --- > .../devicetree/bindings/dma/xilinx/xilinx_vdma.txt | 22 +++++++++++++++++++++- > 1 file changed, 21 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt > index e4c4d47..3d134a5 100644 > --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt > +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt > @@ -3,8 +3,13 @@ It can be configured to have one channel or two channels. If configured > as two channels, one is to transmit to the video device and another is > to receive from the video device. > > +Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream > +target devices. It can be configured to have one channel or two channels. > +If configured as two channels, one is to transmit to the device and another > +is to receive from the device. > + > Required properties: > -- compatible: Should be "xlnx,axi-vdma-1.00.a" > +- compatible: Should be "xlnx,axi-vdma-1.00.a" or "xlnx,axi-dma-1.00.a" > - #dma-cells: Should be <1>, see "dmas" property below > - reg: Should contain VDMA registers location and length. > - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w. > @@ -55,6 +60,21 @@ axi_vdma_0: axivdma@40030000 { > } ; > } ; > > +axi_dma_0: axidma@40400000 { > + compatible = "xlnx,axi-dma-1.00.a"; > + #dma_cells = <1>; > + reg = < 0x40400000 0x10000 >; > + dma-channel@40400000 { > + compatible = "xlnx,axi-vdma-mm2s-channel"; > + interrupts = < 0 59 4 >; > + xlnx,datawidth = <0x40>; > + } ; > + dma-channel@40400030 { > + compatible = "xlnx,axi-vdma-s2mm-channel"; > + interrupts = < 0 58 4 >; > + xlnx,datawidth = <0x40>; > + } ; > +} ; > > * DMA client > > -- > 2.1.2 > -- ~Vinod