Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966326AbcCPI6X (ORCPT ); Wed, 16 Mar 2016 04:58:23 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:5760 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965947AbcCPI6S (ORCPT ); Wed, 16 Mar 2016 04:58:18 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 16 Mar 2016 01:56:49 -0700 From: Wei Ni To: , , CC: , , , , , , Wei Ni Subject: [PATCH V8 10/14] thermal: tegra: handle clocks in one function Date: Wed, 16 Mar 2016 16:58:26 +0800 Message-ID: <1458118706-29993-1-git-send-email-wni@nvidia.com> X-Mailer: git-send-email 1.9.1 X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.19.224.146] X-ClientProxiedBy: HKMAIL102.nvidia.com (10.18.16.11) To HKMAIL101.nvidia.com (10.18.16.10) Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2627 Lines: 96 Handle clock enable/disable codes in one funcion soctherm_clk_enable(), so that the codes are more clear. Signed-off-by: Wei Ni --- drivers/thermal/tegra/soctherm.c | 51 ++++++++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 15 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 67e4a094b430..f60106884ac4 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -428,6 +428,39 @@ static void soctherm_debug_init(struct platform_device *pdev) static inline void soctherm_debug_init(struct platform_device *pdev) {} #endif +static int soctherm_clk_enable(struct platform_device *pdev, bool enable) +{ + struct tegra_soctherm *tegra = platform_get_drvdata(pdev); + int err; + + if (tegra->clock_soctherm == NULL || tegra->clock_tsensor == NULL) + return -EINVAL; + + reset_control_assert(tegra->reset); + + if (enable) { + err = clk_prepare_enable(tegra->clock_soctherm); + if (err) { + reset_control_deassert(tegra->reset); + return err; + } + + err = clk_prepare_enable(tegra->clock_tsensor); + if (err) { + clk_disable_unprepare(tegra->clock_soctherm); + reset_control_deassert(tegra->reset); + return err; + } + } else { + clk_disable_unprepare(tegra->clock_tsensor); + clk_disable_unprepare(tegra->clock_soctherm); + } + + reset_control_deassert(tegra->reset); + + return 0; +} + static const struct of_device_id tegra_soctherm_of_match[] = { #ifdef CONFIG_ARCH_TEGRA_124_SOC { @@ -496,20 +529,10 @@ static int tegra_soctherm_probe(struct platform_device *pdev) return PTR_ERR(tegra->clock_soctherm); } - reset_control_assert(tegra->reset); - - err = clk_prepare_enable(tegra->clock_soctherm); + err = soctherm_clk_enable(pdev, true); if (err) return err; - err = clk_prepare_enable(tegra->clock_tsensor); - if (err) { - clk_disable_unprepare(tegra->clock_soctherm); - return err; - } - - reset_control_deassert(tegra->reset); - /* Initialize raw sensors */ tegra->calib = devm_kzalloc(&pdev->dev, @@ -579,8 +602,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev) return 0; disable_clocks: - clk_disable_unprepare(tegra->clock_tsensor); - clk_disable_unprepare(tegra->clock_soctherm); + soctherm_clk_enable(pdev, false); return err; } @@ -591,8 +613,7 @@ static int tegra_soctherm_remove(struct platform_device *pdev) debugfs_remove_recursive(tegra->debugfs_dir); - clk_disable_unprepare(tegra->clock_tsensor); - clk_disable_unprepare(tegra->clock_soctherm); + soctherm_clk_enable(pdev, false); return 0; } -- 1.9.1