Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934742AbcCPR6m (ORCPT ); Wed, 16 Mar 2016 13:58:42 -0400 Received: from vern.gendns.com ([206.190.152.46]:53067 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755476AbcCPR6j (ORCPT ); Wed, 16 Mar 2016 13:58:39 -0400 Subject: Re: [PATCH 2/5] ARM: davinci: da8xx: add usb phy clocks To: Sergei Shtylyov , Sekhar Nori , Kevin Hilman , Alan Stern , Bin Liu , Petr Kulhavy References: <1458081473-8223-1-git-send-email-david@lechnology.com> <1458081473-8223-2-git-send-email-david@lechnology.com> <56E95128.5000607@cogentembedded.com> Cc: Russell King , Greg Kroah-Hartman , Felipe Balbi , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org From: David Lechner Message-ID: <56E99ECA.90400@lechnology.com> Date: Wed, 16 Mar 2016 12:58:34 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <56E95128.5000607@cogentembedded.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 833 Lines: 30 On 03/16/2016 07:27 AM, Sergei Shtylyov wrote: >> >> +static struct clk usb20_clk = { >> + .name = "usb20", >> + .parent = &pll0_sysclk2, >> + .lpsc = DA8XX_LPSC1_USB20, >> + .gpsc = 1, >> +}; > > Why move it? For organization, to keep all of the USB clocks together. I can leave it alone if that is preferred. >> + >> + /* Set the mux depending on the parent clock. */ >> + if (clk->parent == &pll0_aux_clk) >> + val |= CFGCHIP2_USB2PHYCLKMUX; >> + else if (clk->parent == &usb_ref_clk) >> + val &= ~CFGCHIP2_USB2PHYCLKMUX; > > Don't we have clk_set_parent()for that? Yes. clk_set_parent() is already called in a loop for all clocks elsewhere, so not needed here. --- Thank you for the careful review. I will address the other problems you pointed out.