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Subject: Re: [PATCH 2/5] ARM: davinci: da8xx: add usb phy clocks
To: David Lechner <david@lechnology.com>, Sekhar Nori <nsekhar@ti.com>,
        Kevin Hilman <khilman@kernel.org>,
        Alan Stern <stern@rowland.harvard.edu>, Bin Liu <b-liu@ti.com>,
        Petr Kulhavy <petr@barix.com>
References: <1458081473-8223-1-git-send-email-david@lechnology.com>
 <1458081473-8223-2-git-send-email-david@lechnology.com>
 <56E95128.5000607@cogentembedded.com> <56E99ECA.90400@lechnology.com>
Cc: Russell King <linux@arm.linux.org.uk>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Felipe Balbi <balbi@kernel.org>, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Organization: Cogent Embedded
Message-ID: <56E9A01B.3010503@cogentembedded.com>
Date: Wed, 16 Mar 2016 21:04:11 +0300
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On 03/16/2016 08:58 PM, David Lechner wrote:

>>> +static struct clk usb20_clk = {
>>> +    .name        = "usb20",
>>> +    .parent        = &pll0_sysclk2,
>>> +    .lpsc        = DA8XX_LPSC1_USB20,
>>> +    .gpsc        = 1,
>>> +};
>>
>>     Why move it?
>
> For organization, to keep all of the USB clocks together. I can leave it alone
> if that is preferred.

    I'd prefer to minimize the noise...

>>> +
>>> +    /* Set the mux depending on the parent clock. */
>>> +    if (clk->parent == &pll0_aux_clk)
>>> +        val |= CFGCHIP2_USB2PHYCLKMUX;
>>> +    else if (clk->parent == &usb_ref_clk)
>>> +        val &= ~CFGCHIP2_USB2PHYCLKMUX;
>>
>>     Don't we have clk_set_parent()for that?
>
> Yes. clk_set_parent() is already called in a loop for all clocks elsewhere, so
> not needed here.

    No, I mean why is not this implemented as a part of clk_set_parent()?

MBR, Sergei