Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030402AbcCQLyy (ORCPT ); Thu, 17 Mar 2016 07:54:54 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:34638 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030211AbcCQLyt (ORCPT ); Thu, 17 Mar 2016 07:54:49 -0400 MIME-Version: 1.0 In-Reply-To: <20160317114308.GF2566@sirena.org.uk> References: <1456466217-6793-1-git-send-email-plaes@plaes.org> <1456466217-6793-2-git-send-email-plaes@plaes.org> <20160226122504.GR18327@sirena.org.uk> <20160306214206.GW8418@lukather> <20160317072721.GJ30977@lukather> <20160317114308.GF2566@sirena.org.uk> From: Michal Suchanek Date: Thu, 17 Mar 2016 12:54:08 +0100 Message-ID: Subject: Re: [PATCH 1/2] spi: sun4i: add DMA support To: Mark Brown Cc: Maxime Ripard , Priit Laes , Chen-Yu Tsai , linux-spi , "linux-arm-kernel@lists.infradead.org" , Linux Kernel Mailing List , =?UTF-8?Q?Emilio_L=C3=B3pez?= Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1395 Lines: 30 On 17 March 2016 at 12:43, Mark Brown wrote: > On Thu, Mar 17, 2016 at 11:58:05AM +0100, Michal Suchanek wrote: >> On 17 March 2016 at 08:27, Maxime Ripard > >> > You're mixing two things up: the fact that we can't do more than the >> > FIFO length in PIO and that we're missing DMA support. We have patches >> > to address both, and there's no depedency between the two. > >> The only thing is that although DMA is optional on pretty much any >> system you will have DMA available unless you broke your config. You >> really do want the DMA support when it is available. So there will be >> nobody testing the non-DMA part and it will be prone to bitrot. > > Well, it might be worth doing PIO for very short transfers even if you > have DMA - it's quite common for this to perform better. That's what the driver does. The discussion revolves around the fact that the driver does not attempt to work (even for very short transfers) when the DMA channels are not configured and just bails out. AFAICT the channels are always available when the system is properly configured and the dmaengine driver loaded. Very few device drivers would work with 63byte transfers only and the code for manually driving the CS line in case the DMA engine fails to configure will necessarily go untested most of the time since most systems will have DMA configured properly. Thanks Michal