Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030470AbcCQMFE (ORCPT ); Thu, 17 Mar 2016 08:05:04 -0400 Received: from down.free-electrons.com ([37.187.137.238]:45988 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1030434AbcCQMFB (ORCPT ); Thu, 17 Mar 2016 08:05:01 -0400 Date: Thu, 17 Mar 2016 13:04:59 +0100 From: Alexandre Belloni To: Paul Cercueil Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Ralf Baechle , Alessandro Zummo , Paul Burton , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, rtc-linux@googlegroups.com Subject: Re: [PATCH 2/5] Documentation: dt: Add binding info for jz4740-rtc driver Message-ID: <20160317120459.GC3362@piout.net> References: <1457217531-26064-1-git-send-email-paul@crapouillou.net> <1457217531-26064-2-git-send-email-paul@crapouillou.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1457217531-26064-2-git-send-email-paul@crapouillou.net> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1451 Lines: 39 On 05/03/2016 at 23:38:48 +0100, Paul Cercueil wrote : > Signed-off-by: Paul Cercueil > --- > .../devicetree/bindings/rtc/ingenic,jz4740-rtc.txt | 38 ++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > create mode 100644 Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt > > diff --git a/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt b/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt > new file mode 100644 > index 0000000..71e4ad0 > --- /dev/null > +++ b/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt > @@ -0,0 +1,38 @@ > +JZ4740 and similar SoCs real-time clock driver > + > +Required properties: > + > +- compatible: One of: > + - "ingenic,jz4740-rtc" - for use with the JZ4740 SoC > + - "ingenic,jz4780-rtc" - for use with the JZ4780 SoC > +- reg: Address range of rtc register set > +- interrupts: IRQ number for the alarm interrupt > +- interrupt-parent: phandle of the interrupt controller > +- clocks: phandle to the "rtc" clock > +- clock-names: must be "rtc" > + > +Optional properties: > +- system-power-controller: To use this component as the > + system power controller > +- reset-pin-assert-time: Reset pin low-level assertion time > + after wakeup (default 60ms; range 0-125ms if RTC clock at Trailing whitespace on that line. -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com