Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757361AbcCRO4g (ORCPT ); Fri, 18 Mar 2016 10:56:36 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:1507 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752403AbcCRO4d (ORCPT ); Fri, 18 Mar 2016 10:56:33 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Fri, 18 Mar 2016 07:55:38 -0700 Subject: Re: [PATCH 08/15] genirq: Add runtime power management support for IRQ chips To: Grygorii Strashko , Thomas Gleixner , Jason Cooper , Marc Zyngier , =?UTF-8?Q?Beno=c3=aet_Cousson?= , Tony Lindgren , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Stephen Warren , Thierry Reding References: <1458224359-32665-1-git-send-email-jonathanh@nvidia.com> <1458224359-32665-9-git-send-email-jonathanh@nvidia.com> <56EBE244.6070400@ti.com> <56EBF447.8070808@nvidia.com> <56EC0F7D.8050106@ti.com> <56EC1362.2000005@nvidia.com> CC: Kevin Hilman , Geert Uytterhoeven , Lars-Peter Clausen , Linus Walleij , , , , From: Jon Hunter Message-ID: <56EC1719.5020408@nvidia.com> Date: Fri, 18 Mar 2016 14:56:25 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <56EC1362.2000005@nvidia.com> X-Originating-IP: [10.21.132.114] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1753 Lines: 45 On 18/03/16 14:40, Jon Hunter wrote: > On 18/03/16 14:23, Grygorii Strashko wrote: >> On 03/18/2016 02:27 PM, Jon Hunter wrote: >>> >>> On 18/03/16 11:11, Grygorii Strashko wrote: [snip] >> oh :( That will require updating of all drivers (and if it will be taken into account that >> wakeup can be configured from sysfs + devm_ - it will be painful). > > Will it? I know that there are a few gpio chips that have some hacked > ways to get around the PM issue, but I wonder how many drivers this > really impacts. What sysfs entries are you referring too? Thinking about this some more, yes I guess it would impact all drivers that use a gpio but don't use it for a wake-up. I could see that could be a few drivers indeed. >>> but it would avoid every irqchip having to >>> handle this themselves and having a custom handler. >> >> irqchip like TI OMAP GPIO will need custom handling any way even if it's not expected >> to be Powered off during Suspend or deep CPUIdle states, simply because its state >> in suspend is unknown - PM state managed automatically (and depends on many factors) >> and wakeup can be handled by special HW in case if GPIO bank was really switched off. >> >>>> I propose do not touch common/generic suspend code now. Any common code can be always >>>> refactored later once there will be real drivers updated to use irqchip RPM >>>> and which will support Suspend. >>> >>> If this is strongly opposed, I would concede to making this a pr_debug() >>> as I think it could be useful. >> >> Probably yes, because most of the drivers now and IRQ PM core are not ready >> for this approach. > > May be this calls for a new flag to not WARN if non-wakeup IRQs are not > freed when entering suspend. Flag or pr_debug()? Jon