Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933444AbcCRPhX (ORCPT ); Fri, 18 Mar 2016 11:37:23 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:34888 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933168AbcCRPhR (ORCPT ); Fri, 18 Mar 2016 11:37:17 -0400 From: Alexandre TORGUE To: Maxime Coquelin , Giuseppe Cavallaro , netdev@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh@kernel.org, manabian@gmail.com Subject: [PATCH v5 2/4] Documentation: Bindings: Add STM32 DWMAC glue Date: Fri, 18 Mar 2016 16:37:06 +0100 Message-Id: <1458315428-10081-3-git-send-email-alexandre.torgue@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1458315428-10081-1-git-send-email-alexandre.torgue@gmail.com> References: <1458315428-10081-1-git-send-email-alexandre.torgue@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1536 Lines: 42 Signed-off-by: Alexandre TORGUE diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt b/Documentation/devicetree/bindings/net/stm32-dwmac.txt new file mode 100644 index 0000000..ada2aa4 --- /dev/null +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt @@ -0,0 +1,32 @@ +STMicroelectronics STM32 / MCU DWMAC glue layer controller + +This file documents platform glue layer for stmmac. +Please see stmmac.txt for the other unchanged properties. + +The device node has following properties. + +Required properties: +- compatible: Should be "st,stm32-dwmac" to select glue, and + "snps,dwmac-3.50a" to select IP vesrion. +- clocks: Must contain a phandle for each entry in clock-names. +- clock-names: Should be "stmmaceth" for the host clock. + Should be "tx-clk" for the MAC TX clock. + Should be "rx-clk" for the MAC RX clock. +- st,syscon : Should be phandle/offset pair. The phandle to the syscon node which + encompases the glue register, and the offset of the control register. +Example: + + ethernet0: dwmac@40028000 { + compatible = "st,stm32-dwmac", "snps,dwmac-3.50a"; + status = "disabled"; + reg = <0x40028000 0x8000>; + reg-names = "stmmaceth"; + interrupts = <0 61 0>, <0 62 0>; + interrupt-names = "macirq", "eth_wake_irq"; + clock-names = "stmmaceth", "tx-clk", "rx-clk"; + clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>; + st,syscon = <&syscfg 0x4>; + snps,pbl = <8>; + snps,mixed-burst; + dma-ranges; + }; -- 1.9.1