Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753964AbcCRVK5 (ORCPT ); Fri, 18 Mar 2016 17:10:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37463 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751059AbcCRVKy (ORCPT ); Fri, 18 Mar 2016 17:10:54 -0400 Date: Fri, 18 Mar 2016 22:10:49 +0100 From: Radim =?utf-8?B?S3LEjW3DocWZ?= To: Suravee Suthikulpanit Cc: pbonzini@redhat.com, joro@8bytes.org, bp@alien8.de, gleb@kernel.org, alex.williamson@redhat.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, wei@redhat.com, sherry.hurwitz@amd.com Subject: Re: [PART1 RFC v3 11/12] svm: Do not intercept CR8 when enable AVIC Message-ID: <20160318211048.GB26119@potion.brq.redhat.com> References: <1458281388-14452-1-git-send-email-Suravee.Suthikulpanit@amd.com> <1458281388-14452-12-git-send-email-Suravee.Suthikulpanit@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1458281388-14452-12-git-send-email-Suravee.Suthikulpanit@amd.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2274 Lines: 70 2016-03-18 01:09-0500, Suravee Suthikulpanit: > When enable AVIC: > * Do not intercept CR8 since this should be handled by AVIC HW. > * Also update TPR in APIC backing page when syncing CR8 before VMRUN > > Signed-off-by: Suravee Suthikulpanit > --- > arch/x86/kvm/svm.c | 15 +++++++++++---- > 1 file changed, 11 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c > index ba84d57..d5418c3 100644 > --- a/arch/x86/kvm/svm.c > +++ b/arch/x86/kvm/svm.c > @@ -984,6 +984,8 @@ static __init int svm_hardware_setup(void) > > if (avic) { > printk(KERN_INFO "kvm: AVIC enabled\n"); > + > + svm_x86_ops.update_cr8_intercept = NULL; This doesn't look right. > } else { > svm_x86_ops.deliver_posted_interrupt = NULL; > } > @@ -1097,7 +1099,8 @@ static void init_vmcb(struct vcpu_svm *svm) > set_cr_intercept(svm, INTERCEPT_CR0_WRITE); > set_cr_intercept(svm, INTERCEPT_CR3_WRITE); > set_cr_intercept(svm, INTERCEPT_CR4_WRITE); > - set_cr_intercept(svm, INTERCEPT_CR8_WRITE); > + if (!svm_vcpu_avic_enabled(svm)) > + set_cr_intercept(svm, INTERCEPT_CR8_WRITE); > > set_dr_intercepts(svm); > > @@ -4080,7 +4083,8 @@ static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr) > { > struct vcpu_svm *svm = to_svm(vcpu); > > - if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK)) > + if ((is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK)) || > + svm_vcpu_avic_enabled(svm)) > return; > > clr_cr_intercept(svm, INTERCEPT_CR8_WRITE); > @@ -4271,9 +4275,12 @@ static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu) > if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK)) > return; I think we can exit early with svm_vcpu_avic_enabled(). > > - cr8 = kvm_get_cr8(vcpu); > + cr8 = kvm_get_cr8(vcpu) & V_TPR_MASK; > svm->vmcb->control.int_ctl &= ~V_TPR_MASK; > - svm->vmcb->control.int_ctl |= cr8 & V_TPR_MASK; > + svm->vmcb->control.int_ctl |= cr8; > + > + if (svm_vcpu_avic_enabled(svm)) > + kvm_lapic_set_reg(svm->vcpu.arch.apic, APIC_TASKPRI, (u32)cr8 << 4); kvm_get_cr8() == kvm_lapic_get_reg(APIC_TASKPRI) >> 4. > } > > static void svm_complete_interrupts(struct vcpu_svm *svm) > -- > 1.9.1 >