Date: Sat, 19 Mar 2016 10:52:38 +0100 (CET)
From: Stefan Wahren <stefan.wahren@i2se.com>
To: Martin Sperl <kernel@martin.sperl.org>, Eric Anholt <eric@anholt.net>
Cc: Michael Niewoehner <linux@mniewoehner.de>,
        Tao Huang <huangtao@rock-chips.com>,
        John Youn <John.Youn@synopsys.com>,
        Julius Werner <jwerner@chromium.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
        Caesar Wang <caesar.upstream@gmail.com>,
        Doug Anderson <dianders@chromium.org>,
        Heiko Stuebner <heiko@sntech.de>, Felipe Balbi <balbi@kernel.org>,
        Remi Pommarel <repk@triplefau.lt>
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In-Reply-To: <8E14A795-8C35-4C4D-8D3A-09F29EE42A5F@martin.sperl.org>
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Subject: Re: [RFT PATCH 2/2] Revert "usb: dwc2: Fix probe problem on
 bcm2835"
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Hi,

> Martin Sperl <kernel@martin.sperl.org> hat am 19. März 2016 um 08:44
> geschrieben:
>
>
>
> > On 19.03.2016, at 03:17, Eric Anholt <eric@anholt.net> wrote:
> >
> > Stefan Wahren <stefan.wahren@i2se.com> writes:
> >
> >> Hi Eric,
> >> hi Martin,
> >>
> >>> John Youn <John.Youn@synopsys.com> hat am 16. März 2016 um 19:28
> >>> geschrieben:
> >>>
> >>>
> >>> On 3/10/2016 11:14 AM, John Youn wrote:
> >>>> On 3/9/2016 11:06 AM, Doug Anderson wrote:
> >>>>>
> >>>>> John: it's pretty clear that there's something taking almost exactly
> >>>>> 10ms on my system and almost exactly 50ms on Stefan's system. Is
> >>>>> there some register we could poll to see when this process is done?
> >>>>> ...or can we look at the dwc2 revision number / feature register and
> >>>>> detect how long to delay?
> >>>>>
>
> Maybe this difference is related to overclocking settings in the firmware?
>
> >>>
> >>> 1. What is the AHB Clock frequency? Is the AHB Clock gated during
> >>> Reset?
> >
> > Low confidence here as I'm tracing lines across a ton of modules, but it
> > looks like it comes from the USB AXI clock in peri_image, which is a
> > gate on the normal 250Mhz APB clock, but nothing should be touching that
> > gate register as part of USB reset as far as I know.
> >
> Isn’t it possible that this clock (probably BCM2835_CLOCK_VPU) is
> changed by the firmware due to overclocking settings in /boot/config.txt?

i don't use any overclocking settings. 

Are you able to reproduce the behavior on your Pi?

Stefan

>
> Martin
>
>