Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754516AbcCSMJu (ORCPT ); Sat, 19 Mar 2016 08:09:50 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:52516 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753980AbcCSMJj convert rfc822-to-8bit (ORCPT ); Sat, 19 Mar 2016 08:09:39 -0400 Date: Sat, 19 Mar 2016 13:09:09 +0100 (CET) From: Stefan Wahren To: Martin Sperl Cc: Michael Niewoehner , Tao Huang , John Youn , Julius Werner , Eric Anholt , Greg Kroah-Hartman , "linux-kernel@vger.kernel.org" , "linux-usb@vger.kernel.org" , Caesar Wang , Doug Anderson , Heiko Stuebner , Felipe Balbi , Remi Pommarel Message-ID: <80672566.90271.0f3200d4-5996-4735-91eb-c143ba09de25.open-xchange@email.1und1.de> In-Reply-To: <0AE41019-8E21-4C39-B21F-51CD08C1A3DF@martin.sperl.org> References: <1457115786-11370-1-git-send-email-dianders@chromium.org> <1457115786-11370-2-git-send-email-dianders@chromium.org> <1400647253.149212.b3bb45b6-c852-4cf1-9d3e-9fb299176369.open-xchange@email.1und1.de> <941828343.8833.cdbd40c7-e6f4-4b3e-9665-30fc6680f6e0.open-xchange@email.1und1.de> <56E1C79D.3090104@synopsys.com> <56E9A5E8.7090102@synopsys.com> <1440674775.86542.7bdab192-0ed1-49f2-8559-819af7131cbd.open-xchange@email.1und1.de> <87fuvn1a9p.fsf@eliezer.anholt.net> <8E14A795-8C35-4C4D-8D3A-09F29EE42A5F@martin.sperl.org> <376411469.89406.35996342-72cd-48a5-8893-944da9f8a599.open-xchange@email.1und1.de> <0AE41019-8E21-4C39-B21F-51CD08C1A3DF@martin.sperl.org> Subject: Re: [RFT PATCH 2/2] Revert "usb: dwc2: Fix probe problem on bcm2835" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-Priority: 3 Importance: Medium X-Mailer: Open-Xchange Mailer v7.8.0-Rev26 X-Originating-Client: com.openexchange.ox.gui.dhtml X-Provags-ID: V03:K0:0GDdGGqBuw6Uhod6bGSuVQ+Y6GuqL6ggdBL/UbH+t+NKmR3R/Qe gfKqeeeUdvebVxf4NhXiKoZOZrIoHfj+yQknBkeTTTjhHjC7h0s1SUczPWnnZgBmyYil7Lt nURTQ2iToeqbGG0+9BSc2KqxFTa4rY52LtHftXcSdQ90DWtVVqqDOQpxh1DbwHnN1WznKFl 6NzwmzRuhlQWcrlNVfn7g== X-UI-Out-Filterresults: notjunk:1;V01:K0:xyirh7wi7Ds=:CKLvktIgQDBfSXrsgAgd4G N1GDIJPaJH1cD/Acm8kspjYVNCf6CY/mGxOs0v1Ldf2F79nkLPvzITqm4rqkUB47uR3STO9CI F6RrdUwsBZbO+WZmZCnSzm/syseApxMymKNVuCPdK+15OQY5gV5ROUBchCoU2/bpkRcWJFqaz BImfsVURTc36G1LbnBV2NGs6rj/4wmAmMXYvXIX0e9fcbsAPT4gdFEo3WL9rbibU9TggyIYqj tKcQDCI1FMeFZBAYPywlM+0sZfbOrUeiF6U4U574EeBsM6WCapuJQnJGerkcwbIWtzNsPw1wt 2qydK0Sn4Rs8iJmUXN5fg2+jLx/QrCg9Q91l1iKKgBI7Ir5zUYVHi60vSH4kQQofZC/baqBI+ wvfrTb2wNjf8xpV65Nk39Icp+g0OjEHqixKgiS1D6PKjG5RZGnKzxcZNAD8xq91pNOaC8dk5M cxLiY3LrONsneDQFFZsCLJkuD82RILGvyPx6amqMQZw2aDEZjOu4Q+8sg7C6qNqJJp/0Qs1JN /kitX54gMzm+KrV6duKCeSFLl/RfyQMv3XQtRg/JLNP4wsTNVL9Cgdywj8A1zi7yHq48Cb21Y GfUT1Nh5zxaPiA5hh7uN7K8ATH6hXNtCPWELc2jj6pNhEiIkrj4rvLg48FCEj8GKOsKNt0Wsj RO9ixJZKETn3RNQ6oP+e3CRjgKqotc4j4DgZUFnoU4zNrM/ZyBf1GIpXRbWxBHp/hGHwWPI/H x0xCFaqp/todhM1o Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2455 Lines: 72 Hi, > Martin Sperl hat am 19. März 2016 um 11:10 > geschrieben: > > > > On 19.03.2016, at 10:52, Stefan Wahren wrote: > > > > Hi, > > > >> Martin Sperl hat am 19. März 2016 um 08:44 > >> geschrieben: > >> > >> > >> > >>> On 19.03.2016, at 03:17, Eric Anholt wrote: > >>> > >>> Stefan Wahren writes: > >>> > >>>> Hi Eric, > >>>> hi Martin, > >>>> > >>>>> John Youn hat am 16. März 2016 um 19:28 > >>>>> geschrieben: > >>>>> > >>>>> > >>>>> On 3/10/2016 11:14 AM, John Youn wrote: > >>>>>> On 3/9/2016 11:06 AM, Doug Anderson wrote: > >>>>>>> > >>>>>>> John: it's pretty clear that there's something taking almost exactly > >>>>>>> 10ms on my system and almost exactly 50ms on Stefan's system. Is > >>>>>>> there some register we could poll to see when this process is done? > >>>>>>> ...or can we look at the dwc2 revision number / feature register and > >>>>>>> detect how long to delay? > >>>>>>> > >> > >> Maybe this difference is related to overclocking settings in the firmware? > >> > >>>>> > >>>>> 1. What is the AHB Clock frequency? Is the AHB Clock gated during > >>>>> Reset? > >>> > >>> Low confidence here as I'm tracing lines across a ton of modules, but it > >>> looks like it comes from the USB AXI clock in peri_image, which is a > >>> gate on the normal 250Mhz APB clock, but nothing should be touching that > >>> gate register as part of USB reset as far as I know. > >>> > >> Isn’t it possible that this clock (probably BCM2835_CLOCK_VPU) is > >> changed by the firmware due to overclocking settings in /boot/config.txt? > > > > i don't use any overclocking settings. > > > > Are you able to reproduce the behavior on your Pi? > > I did not have any problems with USB recently (using 4.5), > so I would not have any idea how to reproduce it. > > Note that I am using it with an AXIS USB-ethernet dongle plus USB-stick > all the time on my Compute Module connected via a tiny hub, > so I wonder if that qualifies as being able to trigger the issue... the probe problem appears after applying John's patch series (it's not in 4.5): [RFT PATCH 1/2] usb: dwc2: Add a 10 ms delay to dwc2_core_reset() [RFT PATCH 2/2] Revert "usb: dwc2: Fix probe problem on bcm2835" Please follow the complete discussion here [1]. [1] - http://marc.info/?l=linux-kernel&m=145711582915801&w=2 > > Martin