Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752676AbcCUHQI (ORCPT ); Mon, 21 Mar 2016 03:16:08 -0400 Received: from mga02.intel.com ([134.134.136.20]:44940 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751349AbcCUHP5 (ORCPT ); Mon, 21 Mar 2016 03:15:57 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,370,1455004800"; d="asc'?scan'208";a="928390182" From: Felipe Balbi To: John Youn , Roger Quadros , John Youn Cc: nsekhar@ti.com, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/2] usb: dwc3: core: Introduce dwc3_device_reinit() In-Reply-To: <56EC5452.8030509@synopsys.com> References: <1458133551-3071-1-git-send-email-rogerq@ti.com> <1458133551-3071-2-git-send-email-rogerq@ti.com> <87r3fah8h3.fsf@intel.com> <87lh5ih6hs.fsf@intel.com> <56EC5452.8030509@synopsys.com> User-Agent: Notmuch/0.21 (http://notmuchmail.org) Emacs/25.0.90.3 (x86_64-pc-linux-gnu) Date: Mon, 21 Mar 2016 09:14:48 +0200 Message-ID: <87r3f4z4if.fsf@intel.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha1; protocol="application/pgp-signature" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2751 Lines: 82 --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Hi, John Youn writes: > [ text/plain ] > On 3/16/2016 6:56 AM, Felipe Balbi wrote: >>=20 >> heh, +john >>=20 >> Felipe Balbi writes: >>> [ text/plain ] >>> >>> Hi, >>> >>> Roger Quadros writes: >>>> [ text/plain ] >>>> We will need this function for a workaround. >>>> The function issues a softreset only to the device >>>> controller and performs minimal re-initialization >>>> so that the device controller can be usable. >>>> >>>> As some code is similar to dwc3_core_init() take out >>>> common code into dwc3_get_gctl_quirks(). >>>> >>>> We add a new member (prtcap_mode) to struct dwc3 to >>>> keep track of the current mode in the PRTCAPDIR register. >>>> >>>> Signed-off-by: Roger Quadros >>> >>> I must say, I don't like this at all :-p There's ONE known silicon which >>> needs this because of a poor silicon integration which took an IP with a >>> known erratum where it can't be made to work on lower speeds and STILL >>> was integrated without a superspeed PHY. >>> >>> There's a reason why I never tried to push this upstream myself ;-) >>> >>> I'm really thinking we might be better off adding a quirk flag to skip >>> the metastability workaround and allow this ONE silicon to set the >>> controller to lower speed. >>> >>> John, can you check with your colleagues if we would ever fall into >>> STAR#9000525659 if we set maximum speed to high speed during driver >>> probe and never touch it again ? I would assume we don't really fall >>> into the metastability workaround, right ? We're not doing any sort of >>> PM for dwc3... >>> > > Hi Felipe, > > I don't know much about this but I will check with the engineers and > get back to you. Thank you John ;-) =2D-=20 balbi --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJW759pAAoJEIaOsuA1yqREKBAP/3fz6MEBH/P27Oarx17JuyVo gTpDquQ+JyHEM4zPJP2rcigqzQyjfkLRUQfyIN3nOOqyl7szYjT4CRPd0qzBkgPE svgaOUmNbYjcKflGX5z84rSltT4eo7l1Yu8qTg9AWfhQIyjLB+43Ct0yPtRi3rkh eJ4Z0dg6Np//aXby6TeLeOHWXh4QLj/AeIl8VhBwZIxDjIknQ7SA36Sp98P5HsZR 5sC0HfdK0NMaYfXSCv3u01UilsOD3HEgXwy/SeulP5Z3wRJ4QGwOo7exHvu+OWLa eGHuJ9iW4lW0UyeZVWfXWAl0nQAXogEvR4zIs2BOAahO1e3WhuqeLfd7KCm7v2ZI KxfTRRkM3uaUZokKlA9h1jHY99bBf9gNt+x2yuxD11yEJNXf7+m5zL2xhe1fFQ4l r7amf3aRHQJt+llvdwcxBXSWm6/794aeHnahz2hX5Ck8fDimNQOOYXY42TX9dXAN 3q6p2rN3k4dKF+l2OQqzuPwuYf3yd+gv4guNDa/LRCJGSrdKEcrXdCxGRColcfMg GQjz9JAq+76zcHAkFJPomIKoYj3NpmE3mUvRy8cZKmMAWQJFXmAi0rbjk5JhcuNK RUtWWBFUQ5CFwjnD5XenlMGq+NCU9LReA8Np1nmG6pMjx0SnChynWIkRxPL+9glg H1uBdYB/leQE4mlSCV+7 =1ocf -----END PGP SIGNATURE----- --=-=-=--