Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754378AbcCUKbM (ORCPT ); Mon, 21 Mar 2016 06:31:12 -0400 Received: from mga01.intel.com ([192.55.52.88]:54223 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752647AbcCUKa5 convert rfc822-to-8bit (ORCPT ); Mon, 21 Mar 2016 06:30:57 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,371,1455004800"; d="scan'208";a="941720063" From: Jani Nikula To: Ville =?utf-8?B?U3lyasOkbMOk?= , Lyude Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org, arthur.j.runyan@intel.com, open list , dri-devel@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: Get rid of intel_dp_dpcd_read_wake() In-Reply-To: <20160318164140.GO4329@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <1458229245-8634-1-git-send-email-cpaul@redhat.com> <1458229245-8634-2-git-send-email-cpaul@redhat.com> <20160318141345.GG4329@intel.com> <20160318161235.GN4329@intel.com> <20160318164140.GO4329@intel.com> User-Agent: Notmuch/0.21+80~g3ff6f8b (http://notmuchmail.org) Emacs/24.4.1 (x86_64-pc-linux-gnu) Date: Mon, 21 Mar 2016 12:30:54 +0200 Message-ID: <87lh5ct95t.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1639 Lines: 42 On Fri, 18 Mar 2016, Ville Syrjälä wrote: > On Fri, Mar 18, 2016 at 06:12:35PM +0200, Ville Syrjälä wrote: >> On Fri, Mar 18, 2016 at 04:13:45PM +0200, Ville Syrjälä wrote: >> > On Thu, Mar 17, 2016 at 11:40:45AM -0400, Lyude wrote: >> > > - drm_dp_dpcd_read(aux, DP_DPCD_REV, buffer, 1); >> > >> > NAK >> > >> > If people keep intentionally breaking my shit I'm going to become >> > really grumpy soon. >> >> Oh, and just in case someone wants to come up with a better kludge, >> I just spent a few minutes analyzing the behavior of this crappy >> monitor a. >> >> What happens is that when the monitor is fully powered up (LED is blue) >> things are fine. After the monitor goes to sleep (LED turns orange) >> the first DPCD read will produce garbage. Further DPCD reads are fine, >> even if I wait a significant amount of time between the reads, as long >> as the monitor didn't do a power on->off cycle in between. So it looks >> like it's always just the first read after power down that gets >> corrupted. >> >> Now I think I'll go and test how writes behave, assuming I can find a >> decently sized chunk of DPCD address space I can write. And maybe I >> should also try i2c-over-aux... > > The first DPCD write after powerdown also got corrupted. But i2c-over-aux > seems unaffected for whatever reason. Did the display go to sleep on its own, or did we do something? In particular, does DPCD DP_SET_POWER register play a role? What if we skip writing D3 to it? What if we do that write as the first thing (every time)? BR, Jani. -- Jani Nikula, Intel Open Source Technology Center