Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756844AbcCUP6S (ORCPT ); Mon, 21 Mar 2016 11:58:18 -0400 Received: from mail-bn1on0088.outbound.protection.outlook.com ([157.56.110.88]:27376 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756795AbcCUP6D (ORCPT ); Mon, 21 Mar 2016 11:58:03 -0400 Authentication-Results: spf=fail (sender IP is 66.35.236.227) smtp.mailfrom=opensource.altera.com; vger.kernel.org; dkim=pass (signature was verified) header.d=altera.onmicrosoft.com;vger.kernel.org; dmarc=none action=none header.from=opensource.altera.com; Authentication-Results: alien8.de; dkim=none (message not signed) header.d=none;alien8.de; dmarc=none action=none header.from=opensource.altera.com; From: To: , , , , , , , , , , CC: , , , , , , Subject: [PATCHv3 2/9] EDAC, altera: Move Device structs and defines to header file Date: Mon, 21 Mar 2016 11:01:39 -0500 Message-ID: <1458576106-24505-3-git-send-email-tthayer@opensource.altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1458576106-24505-1-git-send-email-tthayer@opensource.altera.com> References: <1458576106-24505-1-git-send-email-tthayer@opensource.altera.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: CY1PR0601CA0028.namprd06.prod.outlook.com (25.160.162.38) To BY1PR03MB1481.namprd03.prod.outlook.com (25.162.210.14) X-MS-Office365-Filtering-Correlation-Id: 35cb0743-e826-4cd4-9322-08d351a1940d X-Microsoft-Exchange-Diagnostics-untrusted: 1;BY1PR03MB1481;2:P3yCAr2mN5p12nVxPnr1n9gHND3FmAqq7VPyH/rqZhEjUpgwSfxzeGOzj7RfTBUkGw8TKQkxhrsZeMw2wfeS0V4i1njoiwiL12ENkTqLDq4rXDncLh6EjJBGVMREgJhQeqGYpnSIvO867/fHmxkV5hZ/Iya9d8BUVDcgDFrfURlXJFsy0SsYbbN9DaDXb5qv;3:7tf/AYMz/ISAf2icr4o5ZLhVNKr57+r9XPhUfNR9qUNeqoR/GMkq/vtZZiRu4akVWkKIopwzn2DaWR4cYsCtTZUo2H8y0FvWu6kA/g+GQWUNnAyZnBOtzVQOGnEqnCqK;25:bvzHVTkc29GiAd4a8ZFTRRw2eZX0p8f5ihALCKr7klLaQrRew6W2JINs2mRQ1WKC2afGvgIOp8SVKPn39Q11NIhuuijS87B39RYt1cX2B+GtiM0FchOZ9C6F2ECgv1FpOruUDAaz1XdGOHP9MJJuKOtqAK3VHKg8uUNjxEpml2hCeFIZks+wwjTO+s67hdJ1YK28ZCXzBewCrKpu2dhjZzHx57aI2ZPuXOUhfTc1PW+1t581dd4t3RcBDAq5OOwkOGVGSvO2Jjo3YJkk4bd4pm+zGLxpeo8iqPRLsKa3v4TsdyQ/Wvb7BMHqxyYhZot65ORU5inrLucdcv12gFMCMRSch7Vwkrk3zA15D8J8T3ixvEhiqXzgCiO6PKYNj2evWwjDdK2SMSYskDYRqEuKvPHIvFYttXX6A4aGKs1gPP841d6WJdTW0SlmMFtgHxJiIvXuw8fWyIKiEPB2UGOR5RfXYymijDs+rHgd/vVgJyrJOPrO01aEMrUlTA0fmqb0 X-Microsoft-Antispam-Untrusted: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR03MB1481; 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Signed-off-by: Thor Thayer --- v2: Split original patch into smaller patches. Move private data and defines into header file. v3: Commented description above defines. --- drivers/edac/altera_edac.c | 43 ------------------------------------------- drivers/edac/altera_edac.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+), 43 deletions(-) diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index 63e4209..eee7a39 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -78,27 +78,6 @@ static const struct altr_sdram_prv_data a10_data = { .ue_set_mask = A10_DIAGINT_TDERRA_MASK, }; -/************************** EDAC Device Defines **************************/ - -/* OCRAM ECC Management Group Defines */ -#define ALTR_MAN_GRP_OCRAM_ECC_OFFSET 0x04 -#define ALTR_OCR_ECC_EN BIT(0) -#define ALTR_OCR_ECC_INJS BIT(1) -#define ALTR_OCR_ECC_INJD BIT(2) -#define ALTR_OCR_ECC_SERR BIT(3) -#define ALTR_OCR_ECC_DERR BIT(4) - -/* L2 ECC Management Group Defines */ -#define ALTR_MAN_GRP_L2_ECC_OFFSET 0x00 -#define ALTR_L2_ECC_EN BIT(0) -#define ALTR_L2_ECC_INJS BIT(1) -#define ALTR_L2_ECC_INJD BIT(2) - -#define ALTR_UE_TRIGGER_CHAR 'U' /* Trigger for UE */ -#define ALTR_TRIGGER_READ_WRD_CNT 32 /* Line size x 4 */ -#define ALTR_TRIG_OCRAM_BYTE_SIZE 128 /* Line size x 4 */ -#define ALTR_TRIG_L2C_BYTE_SIZE 4096 /* Full Page */ - /*********************** EDAC Memory Controller Functions ****************/ /* The SDRAM controller uses the EDAC Memory Controller framework. */ @@ -571,28 +550,6 @@ module_platform_driver(altr_edac_driver); const struct edac_device_prv_data ocramecc_data; const struct edac_device_prv_data l2ecc_data; -struct edac_device_prv_data { - int (*setup)(struct platform_device *pdev, void __iomem *base); - int ce_clear_mask; - int ue_clear_mask; - char dbgfs_name[20]; - void * (*alloc_mem)(size_t size, void **other); - void (*free_mem)(void *p, size_t size, void *other); - int ecc_enable_mask; - int ce_set_mask; - int ue_set_mask; - int trig_alloc_sz; -}; - -struct altr_edac_device_dev { - void __iomem *base; - int sb_irq; - int db_irq; - const struct edac_device_prv_data *data; - struct dentry *debugfs_dir; - char *edac_dev_name; -}; - static irqreturn_t altr_edac_device_handler(int irq, void *dev_id) { irqreturn_t ret_value = IRQ_NONE; diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h index 953077d..993bb0a 100644 --- a/drivers/edac/altera_edac.h +++ b/drivers/edac/altera_edac.h @@ -195,4 +195,48 @@ struct altr_sdram_mc_data { const struct altr_sdram_prv_data *data; }; +/************************** EDAC Device Defines **************************/ +/***** General Device Trigger Defines *****/ +#define ALTR_UE_TRIGGER_CHAR 'U' /* Trigger for UE */ +#define ALTR_TRIGGER_READ_WRD_CNT 32 /* Line size x 4 */ +#define ALTR_TRIG_OCRAM_BYTE_SIZE 128 /* Line size x 4 */ +#define ALTR_TRIG_L2C_BYTE_SIZE 4096 /* Full Page */ + +/******* Cyclone5 and Arria5 Defines *******/ +/* OCRAM ECC Management Group Defines */ +#define ALTR_MAN_GRP_OCRAM_ECC_OFFSET 0x04 +#define ALTR_OCR_ECC_EN BIT(0) +#define ALTR_OCR_ECC_INJS BIT(1) +#define ALTR_OCR_ECC_INJD BIT(2) +#define ALTR_OCR_ECC_SERR BIT(3) +#define ALTR_OCR_ECC_DERR BIT(4) + +/* L2 ECC Management Group Defines */ +#define ALTR_MAN_GRP_L2_ECC_OFFSET 0x00 +#define ALTR_L2_ECC_EN BIT(0) +#define ALTR_L2_ECC_INJS BIT(1) +#define ALTR_L2_ECC_INJD BIT(2) + +struct edac_device_prv_data { + int (*setup)(struct platform_device *pdev, void __iomem *base); + int ce_clear_mask; + int ue_clear_mask; + char dbgfs_name[20]; + void * (*alloc_mem)(size_t size, void **other); + void (*free_mem)(void *p, size_t size, void *other); + int ecc_enable_mask; + int ce_set_mask; + int ue_set_mask; + int trig_alloc_sz; +}; + +struct altr_edac_device_dev { + void __iomem *base; + int sb_irq; + int db_irq; + const struct edac_device_prv_data *data; + struct dentry *debugfs_dir; + char *edac_dev_name; +}; + #endif /* #ifndef _ALTERA_EDAC_H */ -- 1.7.9.5