Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757226AbcCUQAf (ORCPT ); Mon, 21 Mar 2016 12:00:35 -0400 Received: from mail-by2on0091.outbound.protection.outlook.com ([207.46.100.91]:24600 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756826AbcCUP6R (ORCPT ); Mon, 21 Mar 2016 11:58:17 -0400 Authentication-Results: spf=fail (sender IP is 66.35.236.227) smtp.mailfrom=opensource.altera.com; vger.kernel.org; dkim=pass (signature was verified) header.d=altera.onmicrosoft.com;vger.kernel.org; dmarc=none action=none header.from=opensource.altera.com; Authentication-Results: alien8.de; dkim=none (message not signed) header.d=none;alien8.de; dmarc=none action=none header.from=opensource.altera.com; From: To: , , , , , , , , , , CC: , , , , , , Subject: [PATCHv3 5/9] EDAC, altera: Add register offset for ECC Error Inject Date: Mon, 21 Mar 2016 11:01:42 -0500 Message-ID: <1458576106-24505-6-git-send-email-tthayer@opensource.altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1458576106-24505-1-git-send-email-tthayer@opensource.altera.com> References: <1458576106-24505-1-git-send-email-tthayer@opensource.altera.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: CY1PR0601CA0028.namprd06.prod.outlook.com (25.160.162.38) To BY1PR03MB1481.namprd03.prod.outlook.com (25.162.210.14) X-MS-Office365-Filtering-Correlation-Id: e7c80e51-544d-4826-19aa-08d351a19c65 X-Microsoft-Exchange-Diagnostics-untrusted: 1;BY1PR03MB1481;2:Z+MYVMcjHPZeRQMB6XD5pLzK4016dKktWz/QQBkd7/QLJBQ0wHUGuHm2S4jlyGVLHrt2ytc2bqTaZMvSNXbNoQKTcNYhalALQT63PgyVpU8fu8xP/YwcX/tNcnJo8k7yrgbCRe4uMHU74lqfNdrsGzG+7Aqsv42ZiaUkBwgkZspcF68lYAPICeOK5W1+h1vw;3:SBWEfuY3ogB/hMjFWaAERs+hKl8C4xXfu8x0xpHIcyaLsKKzD5ZOw2muEdw7kYauWyv1Fm37zCXCX3VFHaOWQqnkLnioIkffMD9tfXzYLRWFmiXHWnlM3WaEMO30x0OR;25:pX12eswNWTXhsLimTYpVVPTUmkUZuHfD6rIDbwuVxtDHV1g5MwB6QdclSHtUEwDkGNX4llQJs15trmmnRMXbQlS1ZTKWXBhcZB+oCS6TCJmkRO7OXCY5AyihVxSJeE2Gth52S8dwy815wanHoDle5inl5LuGyioDCztWA9m+Rq+bed5HrfPC1CLhFPBcx8v/bYB4wcjf8uxF/+HWNq+Ihbny8O1KO3nmusoeLeJVYoPYJ7ranS3JVcBMa4hLWOFH38x+Da21difAPQuWdO6s50RPUFy6rHjOyZ5zA1NoHd1eF8TdzVkVbDQl2oheDMpkiME/XgvQ+UpekGm6W85X+asy8Fa7BStbh5CVMsioY/iQkGLipqDVOaQPUbpanny3h+Q0pXWuTIUTtfva7l5vjkGJo0YAbmF8WgZUerkFuFeQu6zd2ABCd8pYGQvmtKy6LTYGCRoVbxQsYGej7aba+ibu8C5rhdSqt1+i8XpjbcIXjVbgz77uBzyHb5F0+wJzt19ctDFk/FYsIOQPE6R07w== X-Microsoft-Antispam-Untrusted: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR03MB1481; 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Signed-off-by: Thor Thayer --- v2: Split large patch into smaller patches. Add an ECC error inject offset to support the different register layout of Arria10 peripheral ECCs. v3: Addition of offset defines (previously in ECC Enable patch that was dropped). --- drivers/edac/altera_edac.c | 7 +++++-- drivers/edac/altera_edac.h | 3 +++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index 0dbfa47..502bf1f 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -622,8 +622,9 @@ static ssize_t altr_edac_device_trig(struct file *file, if (ACCESS_ONCE(ptemp[i])) result = -1; /* Toggle Error bit (it is latched), leave ECC enabled */ - writel(error_mask, drvdata->base); - writel(priv->ecc_enable_mask, drvdata->base); + writel(error_mask, (drvdata->base + priv->set_err_ofst)); + writel(priv->ecc_enable_mask, (drvdata->base + + priv->set_err_ofst)); ptemp[i] = i; } /* Ensure it has been written out */ @@ -879,6 +880,7 @@ const struct edac_device_prv_data ocramecc_data = { .ecc_enable_mask = ALTR_OCR_ECC_EN, .ce_set_mask = (ALTR_OCR_ECC_EN | ALTR_OCR_ECC_INJS), .ue_set_mask = (ALTR_OCR_ECC_EN | ALTR_OCR_ECC_INJD), + .set_err_ofst = ALTR_OCR_ECC_REG_OFFSET, .trig_alloc_sz = ALTR_TRIG_OCRAM_BYTE_SIZE, }; @@ -949,6 +951,7 @@ const struct edac_device_prv_data l2ecc_data = { .ecc_enable_mask = ALTR_L2_ECC_EN, .ce_set_mask = (ALTR_L2_ECC_EN | ALTR_L2_ECC_INJS), .ue_set_mask = (ALTR_L2_ECC_EN | ALTR_L2_ECC_INJD), + .set_err_ofst = ALTR_L2_ECC_REG_OFFSET, .trig_alloc_sz = ALTR_TRIG_L2C_BYTE_SIZE, }; diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h index 32c798a..d7ef94c 100644 --- a/drivers/edac/altera_edac.h +++ b/drivers/edac/altera_edac.h @@ -205,6 +205,7 @@ struct altr_sdram_mc_data { /******* Cyclone5 and Arria5 Defines *******/ /* OCRAM ECC Management Group Defines */ #define ALTR_MAN_GRP_OCRAM_ECC_OFFSET 0x04 +#define ALTR_OCR_ECC_REG_OFFSET 0x00 #define ALTR_OCR_ECC_EN BIT(0) #define ALTR_OCR_ECC_INJS BIT(1) #define ALTR_OCR_ECC_INJD BIT(2) @@ -213,6 +214,7 @@ struct altr_sdram_mc_data { /* L2 ECC Management Group Defines */ #define ALTR_MAN_GRP_L2_ECC_OFFSET 0x00 +#define ALTR_L2_ECC_REG_OFFSET 0x00 #define ALTR_L2_ECC_EN BIT(0) #define ALTR_L2_ECC_INJS BIT(1) #define ALTR_L2_ECC_INJD BIT(2) @@ -229,6 +231,7 @@ struct edac_device_prv_data { int ecc_enable_mask; int ce_set_mask; int ue_set_mask; + int set_err_ofst; int trig_alloc_sz; }; -- 1.7.9.5