Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756886AbcCUQQs (ORCPT ); Mon, 21 Mar 2016 12:16:48 -0400 Received: from mga14.intel.com ([192.55.52.115]:13806 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756064AbcCUQQo (ORCPT ); Mon, 21 Mar 2016 12:16:44 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,372,1455004800"; d="scan'208";a="941925202" From: Andi Kleen To: x86@kernel.org Cc: luto@amacapital.net, linux-kernel@vger.kernel.org Subject: Updated version of RD/WR FS/GS BASE patchkit Date: Mon, 21 Mar 2016 09:16:00 -0700 Message-Id: <1458576969-13309-1-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 2.5.5 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1011 Lines: 29 This is a reworked version of my older fsgsbase patchkit. Main changes: - Ported to new entry/* code, which simplified it somewhat - Now has a test program - Fixed ptrace/core dump support - Better documentation - Some minor fixes improvement This adds kernel support for some Intel instructions that allow fast access to the FS and GS 64bit base. They need some changes to entry_64.S because they allow user to fully control the GS base. Advantages: - NMIs (and other "paranoid" interrupts) avoid one RDMSR which makes them faster - User space can use these instructions, mainly for efficient context switching with user thread libraries - Context switches do not need to use MSR writes anymore to context switch FS/GS base >4GB. This will speed up applications that have enough thread local data that it won't fit below 4GB. - User space can use GS efficiently as an additional global pointer register I also included one minor (unrelated) optimization to disable an unneeded old SWAPGS workaround. -Andi