Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757190AbcCUQSO (ORCPT ); Mon, 21 Mar 2016 12:18:14 -0400 Received: from mga02.intel.com ([134.134.136.20]:20008 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756412AbcCUQQP (ORCPT ); Mon, 21 Mar 2016 12:16:15 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,372,1455004800"; d="scan'208";a="70489990" From: Andi Kleen To: x86@kernel.org Cc: luto@amacapital.net, linux-kernel@vger.kernel.org, Andi Kleen Subject: [PATCH 1/9] x86: Add intrinsics/macros for new rd/wr fs/gs base instructions Date: Mon, 21 Mar 2016 09:16:01 -0700 Message-Id: <1458576969-13309-2-git-send-email-andi@firstfloor.org> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1458576969-13309-1-git-send-email-andi@firstfloor.org> References: <1458576969-13309-1-git-send-email-andi@firstfloor.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1857 Lines: 79 From: Andi Kleen Add C intrinsics and assembler macros for the new rd/wr fs/gs base instructions and for swapgs. Very straight forward. Used in followon patch. For assembler only a few standard registers used by entry_64.S are defined. v2: Use __always_inline Signed-off-by: Andi Kleen --- arch/x86/include/asm/fsgs.h | 54 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 arch/x86/include/asm/fsgs.h diff --git a/arch/x86/include/asm/fsgs.h b/arch/x86/include/asm/fsgs.h new file mode 100644 index 0000000..8a9f900 --- /dev/null +++ b/arch/x86/include/asm/fsgs.h @@ -0,0 +1,54 @@ +#ifndef _ASM_FSGS_H +#define _ASM_FSGS_H 1 + +#ifndef __ASSEMBLY__ + +static __always_inline void swapgs(void) +{ + asm volatile("swapgs" ::: "memory"); +} + +/* Must be protected by X86_FEATURE_FSGSBASE check. */ + +static __always_inline unsigned long rdgsbase(void) +{ + unsigned long gs; + asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xc8 # rdgsbaseq %%rax" + : "=a" (gs) + :: "memory"); + return gs; +} + +static __always_inline unsigned long rdfsbase(void) +{ + unsigned long fs; + asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xc0 # rdfsbaseq %%rax" + : "=a" (fs) + :: "memory"); + return fs; +} + +static __always_inline void wrgsbase(unsigned long gs) +{ + asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xd8 # wrgsbaseq %%rax" + :: "a" (gs) + : "memory"); +} + +static __always_inline void wrfsbase(unsigned long fs) +{ + asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xd0 # wrfsbaseq %%rax" + :: "a" (fs) + : "memory"); +} + +#else + +/* Handle old assemblers. */ +#define RDGSBASE_R15 .byte 0xf3,0x49,0x0f,0xae,0xcf +#define WRGSBASE_RDI .byte 0xf3,0x48,0x0f,0xae,0xdf +#define WRGSBASE_R15 .byte 0xf3,0x49,0x0f,0xae,0xdf + +#endif /* __ASSEMBLY__ */ + +#endif -- 2.5.5