Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757925AbcCUTZc (ORCPT ); Mon, 21 Mar 2016 15:25:32 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:11174 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757778AbcCUTVg (ORCPT ); Mon, 21 Mar 2016 15:21:36 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 21 Mar 2016 12:20:34 -0700 Message-ID: <56F04999.6090902@nvidia.com> Date: Mon, 21 Mar 2016 12:20:57 -0700 From: Sai Gurrappadi User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Juri Lelli CC: , , , , , , , , , , , , , , , , Pawel Moll , Ian Campbell , Kumar Gala , Maxime Ripard , Olof Johansson , Gregory CLEMENT , Paul Walmsley , Linus Walleij , Chen-Yu Tsai , Thomas Petazzoni , Subject: Re: [PATCH v4 2/8] Documentation: arm: define DT cpu capacity bindings References: <1458311054-13524-1-git-send-email-juri.lelli@arm.com> <1458311054-13524-3-git-send-email-juri.lelli@arm.com> <56EC3F9E.4050209@nvidia.com> <20160321105330.GB12319@e106622-lin> In-Reply-To: <20160321105330.GB12319@e106622-lin> X-NVConfidentiality: public Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [172.17.187.121] X-ClientProxiedBy: HQMAIL103.nvidia.com (172.20.187.11) To HQMAIL101.nvidia.com (172.20.187.10) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2211 Lines: 56 On 03/21/2016 03:53 AM, Juri Lelli wrote: > Hi Sai, > > On 18/03/16 10:49, Sai Gurrappadi wrote: >> Hi Juri, >> >> On 03/18/2016 07:24 AM, Juri Lelli wrote: >> >> >> >>> + >>> +========================================== >>> +2 - CPU capacity definition >>> +========================================== >>> + >>> +CPU capacity is a number that provides the scheduler information about CPUs >>> +heterogeneity. Such heterogeneity can come from micro-architectural differences >>> +(e.g., ARM big.LITTLE systems) or maximum frequency at which CPUs can run >>> +(e.g., SMP systems with multiple frequency domains). Heterogeneity in this >>> +context is about differing performance characteristics; this binding tries to >>> +capture a first-order approximation of the relative performance of CPUs. >> >> Any reason why this capacity number is not dynamically generated based on the >> max frequency for each CPU? The DT property would then instead specify just >> the micro-architectural differences between the CPU types. >> > > I'm not sure I clearly understand your question, so I'll try to > reiterate it. > > Are you asking why we don't dynamically profile the system, at boot for > example, to get this number? Or do you ask why this number couldn't be > only describing micro-arch differences (so, if I get it right, we should > then multiply it by max freq to get the capacity of a CPU)? > > We already played with the first option (please refer to v2 and v3), but > we ended up agreeing that dynamic profiling adds overhead to the boot > process (while a DT approach can provide information to speed up boot) > and it is in general not repeatable/reliable (as numbers can vary from > boot to boot for different reasons). > > The second option I think can be feasible, but I'm not sure what we gain > in practice. We will still need to specify a per-platform number, right? I meant the second bit. We only need some per-platform fudge factor for micro-architectural differences. Tying in the Fmax like this statically means that we need to manually synchronize DVFS tables and this number which seems unnecessary given that the kernel already has this info on boot. > > Best, > > - Juri >