Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757774AbcCUT5P (ORCPT ); Mon, 21 Mar 2016 15:57:15 -0400 Received: from smtprelay.synopsys.com ([198.182.60.111]:58282 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932126AbcCUT5L (ORCPT ); Mon, 21 Mar 2016 15:57:11 -0400 Subject: Re: [PATCH 1/2] usb: dwc3: core: Introduce dwc3_device_reinit() To: Felipe Balbi , Roger Quadros , John Youn References: <1458133551-3071-1-git-send-email-rogerq@ti.com> <1458133551-3071-2-git-send-email-rogerq@ti.com> <87r3fah8h3.fsf@intel.com> <87lh5ih6hs.fsf@intel.com> <56EC5452.8030509@synopsys.com> From: John Youn CC: "nsekhar@ti.com" , "linux-usb@vger.kernel.org" , "linux-kernel@vger.kernel.org" Message-ID: <56F03FD7.30202@synopsys.com> Date: Mon, 21 Mar 2016 11:39:19 -0700 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <56EC5452.8030509@synopsys.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.9.139.119] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1894 Lines: 52 On 3/18/2016 12:17 PM, John Youn wrote: > On 3/16/2016 6:56 AM, Felipe Balbi wrote: >> >> heh, +john >> >> Felipe Balbi writes: >>> [ text/plain ] >>> >>> Hi, >>> >>> Roger Quadros writes: >>>> [ text/plain ] >>>> We will need this function for a workaround. >>>> The function issues a softreset only to the device >>>> controller and performs minimal re-initialization >>>> so that the device controller can be usable. >>>> >>>> As some code is similar to dwc3_core_init() take out >>>> common code into dwc3_get_gctl_quirks(). >>>> >>>> We add a new member (prtcap_mode) to struct dwc3 to >>>> keep track of the current mode in the PRTCAPDIR register. >>>> >>>> Signed-off-by: Roger Quadros >>> >>> I must say, I don't like this at all :-p There's ONE known silicon which >>> needs this because of a poor silicon integration which took an IP with a >>> known erratum where it can't be made to work on lower speeds and STILL >>> was integrated without a superspeed PHY. >>> >>> There's a reason why I never tried to push this upstream myself ;-) >>> >>> I'm really thinking we might be better off adding a quirk flag to skip >>> the metastability workaround and allow this ONE silicon to set the >>> controller to lower speed. >>> >>> John, can you check with your colleagues if we would ever fall into >>> STAR#9000525659 if we set maximum speed to high speed during driver >>> probe and never touch it again ? I would assume we don't really fall >>> into the metastability workaround, right ? We're not doing any sort of >>> PM for dwc3... >>> Hi Felipe, Do you mean to keep DCFG.speed to SS and set dwc->maximum_speed to HS? I don't see an issue with that as long as we always ignore dwc->maximum_speed when programming DCFG.speed for all affected versions of the core. As long as the DCFG.speed = SS, you should not hit the STAR. John