Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759254AbcCVO3x (ORCPT ); Tue, 22 Mar 2016 10:29:53 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:38186 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754003AbcCVO3w (ORCPT ); Tue, 22 Mar 2016 10:29:52 -0400 Subject: Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property To: Robin Murphy , Rob Herring References: <1457005210-18485-1-git-send-email-narmstrong@baylibre.com> <1457519060-6038-1-git-send-email-narmstrong@baylibre.com> <1457519060-6038-3-git-send-email-narmstrong@baylibre.com> <20160317170926.GA28934@rob-hp-laptop> <56EAF212.7020700@arm.com> <56EB03B3.3070106@arm.com> <56F10E84.1080607@baylibre.com> <56F13458.1080401@arm.com> Cc: "devicetree@vger.kernel.org" , Daniel Lezcano , "linux-kernel@vger.kernel.org" , Sudeep Holla , Russell King , Thomas Gleixner , "linux-arm-kernel@lists.infradead.org" From: Neil Armstrong Organization: Baylibre Message-ID: <56F156DA.3000602@baylibre.com> Date: Tue, 22 Mar 2016 15:29:46 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <56F13458.1080401@arm.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1780 Lines: 36 On 03/22/2016 01:02 PM, Robin Murphy wrote: > Hi Neil, >>>> >>>> Humm, same as integrator timers perhaps? >>> >>> Having had a quick look, what the Integrator/AP manual describes certainly smells like the same basic block as the "AMBA Timer" - 16 bit counters and the same control register layout - albeit in a mutant triple-timer version with a bigger offset between each register set. Integrator/CP, on the other hand, looks much more SP804-like. >>> >>> Robin. >>> >> >> Hi, >> >> I will switch to oxsemi,ox810se-rps-timer since it need a specific register width that will be handled by the driver. > > By "needs a specific register width" do you mean the OxSemi implementation will give a bus error on a 32-bit access and requires 16-bit accessors? If so, I'd expect to see patch 1 changing readl()s to readw()s at least somewhere. Otherwise, if it's merely that the clocksource API needs to know the upper 16 bits of a word it reads are undefined, then since that's the standard behaviour I'd be inclined to add it to the driver as a canonical "arm,amba-timer" implementation, then have your implementation-specific compatible on top of that just in case. No actually the bus access is 32bit but the counter is 24bit wide instead of 16bit, so the clocksource won't work and the system time will furiously drift. It's not the case of the clockevent since the delay fits in 24 bits. It also seems is ignores the 32BIT config bit, so it seems based on the initial 16bit only reference design. How do you think I should implement this ? Neil > Robin. > >> >> Thanks, >> Neil >> >> _______________________________________________ >> linux-arm-kernel mailing list >> linux-arm-kernel@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >> >