Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753666AbcCWGiS (ORCPT ); Wed, 23 Mar 2016 02:38:18 -0400 Received: from mail.kmu-office.ch ([178.209.48.109]:37662 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751188AbcCWGiJ (ORCPT ); Wed, 23 Mar 2016 02:38:09 -0400 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Tue, 22 Mar 2016 23:35:04 -0700 From: Stefan Agner To: Bhuvanchandra DV Cc: broonie@kernel.org, shawnguo@kernel.org, kernel@pengutronix.de, haikun.wang@freescale.com, han.xu@nxp.com, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] spi: fsl-dspi: Set max_speed_hz for master In-Reply-To: <1458591112-2743-1-git-send-email-bhuvanchandra.dv@toradex.com> References: <1458591112-2743-1-git-send-email-bhuvanchandra.dv@toradex.com> Message-ID: User-Agent: Roundcube Webmail/1.1.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1533 Lines: 55 On 2016-03-21 13:11, Bhuvanchandra DV wrote: > Calculate and update max speed from bus clock for SoC's > using DSPI IP. > > The bus clock factor's are taken from the data sheet's > of respective SoC's. Plurals are without apostrophe... I wonder if GCC optimizes this to a bit shift... Acked-by: Stefan Agner > > Signed-off-by: Bhuvanchandra DV > --- > drivers/spi/spi-fsl-dspi.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c > index 59a1143..8753276 100644 > --- a/drivers/spi/spi-fsl-dspi.c > +++ b/drivers/spi/spi-fsl-dspi.c > @@ -121,18 +121,22 @@ enum dspi_trans_mode { > > struct fsl_dspi_devtype_data { > enum dspi_trans_mode trans_mode; > + u8 max_clock_factor; > }; > > static const struct fsl_dspi_devtype_data vf610_data = { > .trans_mode = DSPI_EOQ_MODE, > + .max_clock_factor = 2, > }; > > static const struct fsl_dspi_devtype_data ls1021a_v1_data = { > .trans_mode = DSPI_TCFQ_MODE, > + .max_clock_factor = 8, > }; > > static const struct fsl_dspi_devtype_data ls2085a_data = { > .trans_mode = DSPI_TCFQ_MODE, > + .max_clock_factor = 8, > }; > > struct fsl_dspi { > @@ -726,6 +730,9 @@ static int dspi_probe(struct platform_device *pdev) > } > clk_prepare_enable(dspi->clk); > > + master->max_speed_hz = > + clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor; > + > init_waitqueue_head(&dspi->waitq); > platform_set_drvdata(pdev, master);