Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756720AbcCXBjO (ORCPT ); Wed, 23 Mar 2016 21:39:14 -0400 Received: from mga03.intel.com ([134.134.136.65]:39583 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752248AbcCXBjK (ORCPT ); Wed, 23 Mar 2016 21:39:10 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,383,1455004800"; d="scan'208";a="943819747" From: Lv Zheng To: "Rafael J. Wysocki" , "Rafael J. Wysocki" , Len Brown Cc: Lv Zheng , Lv Zheng , , linux-acpi@vger.kernel.org, Al Stone , Bob Moore Subject: [PATCH 06/30] ACPICA: IORT: Add in support for the SMMUv3 subtable Date: Thu, 24 Mar 2016 09:39:07 +0800 Message-Id: X-Mailer: git-send-email 1.7.10 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2087 Lines: 68 From: Al Stone ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e The most recent version of the IORT specification adds in a definition for a subtable to describe SMMUv3 devices; there is already a subtable for SMMUv1/v2 devices. Add in the definition of the subtable, add in the code to compile it, and add in a template for it. Link: https://github.com/acpica/acpica/commit/9f7c3e14 Signed-off-by: Al Stone Signed-off-by: Bob Moore Signed-off-by: Lv Zheng --- include/acpi/actbl2.h | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h index e9d3cc1..d6bd377 100644 --- a/include/acpi/actbl2.h +++ b/include/acpi/actbl2.h @@ -660,7 +660,7 @@ struct acpi_ibft_target { * IORT - IO Remapping Table * * Conforms to "IO Remapping Table System Software on ARM Platforms", - * Document number: ARM DEN 0049A, 2015 + * Document number: ARM DEN 0049B, October 2015 * ******************************************************************************/ @@ -690,7 +690,8 @@ enum acpi_iort_node_type { ACPI_IORT_NODE_ITS_GROUP = 0x00, ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, - ACPI_IORT_NODE_SMMU = 0x03 + ACPI_IORT_NODE_SMMU = 0x03, + ACPI_IORT_NODE_SMMU_V3 = 0x04 }; struct acpi_iort_id_mapping { @@ -780,6 +781,23 @@ struct acpi_iort_smmu { #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) +struct acpi_iort_smmu_v3 { + u64 base_address; /* SMMUv3 base address */ + u32 flags; + u32 reserved; + u64 vatos_address; + u32 model; /* O: generic SMMUv3 */ + u32 event_gsiv; + u32 pri_gsiv; + u32 gerr_gsiv; + u32 sync_gsiv; +}; + +/* Masks for Flags field above */ + +#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) +#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1) + /******************************************************************************* * * IVRS - I/O Virtualization Reporting Structure -- 1.7.10