Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754536AbcC1GvW (ORCPT ); Mon, 28 Mar 2016 02:51:22 -0400 Received: from asavdk4.altibox.net ([109.247.116.15]:42649 "EHLO asavdk4.altibox.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753081AbcC1GvO (ORCPT ); Mon, 28 Mar 2016 02:51:14 -0400 Date: Mon, 28 Mar 2016 08:51:06 +0200 From: Sam Ravnborg To: "zhaoxiu.zeng" Cc: Denys Vlasenko , Arnd Bergmann , Andrew Morton , Martin Kepplinger , Sasha Levin , Ingo Molnar , Yury Norov , linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, "David S. Miller" Subject: Re: [PATCH 01/31] bitops: add parity functions Message-ID: <20160328065106.GA12154@ravnborg.org> References: <1458788612-4367-1-git-send-email-zhaoxiu.zeng@gmail.com> <56F3A77D.6060802@redhat.com> <56F75490.9010608@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <56F75490.9010608@gmail.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-CMAE-Score: 0 X-CMAE-Analysis: v=2.1 cv=Fo6lhzfq c=1 sm=1 tr=0 a=Ij76tQDYWdb01v2+RnYW5w==:117 a=Ij76tQDYWdb01v2+RnYW5w==:17 a=L9H7d07YOLsA:10 a=9cW_t1CCXrUA:10 a=s5jvgZ67dGcA:10 a=kj9zAlcOel0A:10 a=cqvmlmxeAAAA:8 a=IQXkR5oP9Z18AC1z6ooA:9 a=CjuIK1q_8ugA:10 a=t_ttxzwXqboA:10 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1356 Lines: 50 > diff --git a/include/asm-generic/bitops/arch_parity.h b/include/asm-generic/bitops/arch_parity.h > new file mode 100644 > index 0000000..cddc555 > --- /dev/null > +++ b/include/asm-generic/bitops/arch_parity.h > @@ -0,0 +1,39 @@ > +#ifndef _ASM_GENERIC_BITOPS_ARCH_PARITY_H_ > +#define _ASM_GENERIC_BITOPS_ARCH_PARITY_H_ > + > +#include > + > +/* > + * Refrence to 'https://graphics.stanford.edu/~seander/bithacks.html#ParityParallel'. > + */ > + > +static inline unsigned int __arch_parity4(unsigned int w) > +{ > + w &= 0xf; > + return (0x6996 >> w) & 1; > +} > + > +static inline unsigned int __arch_parity8(unsigned int w) > +{ > + w ^= w >> 4; > + return __arch_parity4(w); > +} > + > +static inline unsigned int __arch_parity16(unsigned int w) > +{ > + w ^= w >> 8; > + return __arch_parity8(w); > +} > + > +static inline unsigned int __arch_parity32(unsigned int w) > +{ > + w ^= w >> 16; > + return __arch_parity16(w); > +} > + > +static inline unsigned int __arch_parity64(__u64 w) > +{ > + return __arch_parity32((unsigned int)(w >> 32) ^ (unsigned int)w); > +} Defining these as static inlines in asm-generic prevent an architecture from selecting between a more optimal asm version or the generic version at run-time. sparc would benefit from this as only some sparc chips supports popc. See how this is done for hweight* Sam