Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755366AbcC1UCH (ORCPT ); Mon, 28 Mar 2016 16:02:07 -0400 Received: from mga02.intel.com ([134.134.136.20]:13705 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755257AbcC1UCF (ORCPT ); Mon, 28 Mar 2016 16:02:05 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,408,1455004800"; d="scan'208";a="920449557" Message-ID: <1459195338.13525.37.camel@linux.intel.com> Subject: Re: [PATCH] x86: cpufreq: remove duplicated TDP MSR macro definitions From: Srinivas Pandruvada To: Vladimir Zapolskiy , "Rafael J. Wysocki" , Len Brown Cc: Kristen Carlson Accardi , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org Date: Mon, 28 Mar 2016 13:02:18 -0700 In-Reply-To: <1459018020-24577-1-git-send-email-vladimir_zapolskiy@mentor.com> References: <1459018020-24577-1-git-send-email-vladimir_zapolskiy@mentor.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.18.5.1 (3.18.5.1-1.fc23) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1556 Lines: 43 On Sat, 2016-03-26 at 20:47 +0200, Vladimir Zapolskiy wrote: > The list of CPU model specific registers contains two copies of TDP > registers, remove the one, which is out of numerical order in the > list. > Thanks for finding this. > Fixes: 6a35fc2d6c22 ("cpufreq: intel_pstate: get P1 from TAR when > available") > Signed-off-by: Vladimir Zapolskiy  Reviewed-by: Srinivas Pandruvada > --- >  arch/x86/include/asm/msr-index.h | 8 +------- >  1 file changed, 1 insertion(+), 7 deletions(-) > > diff --git a/arch/x86/include/asm/msr-index.h > b/arch/x86/include/asm/msr-index.h > index 2da46ac..426e946 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -190,6 +190,7 @@ >  #define MSR_PP1_ENERGY_STATUS 0x00000641 >  #define MSR_PP1_POLICY 0x00000642 >   > +/* Config TDP MSRs */ >  #define MSR_CONFIG_TDP_NOMINAL 0x00000648 >  #define MSR_CONFIG_TDP_LEVEL_1 0x00000649 >  #define MSR_CONFIG_TDP_LEVEL_2 0x0000064A > @@ -210,13 +211,6 @@ >  #define MSR_GFX_PERF_LIMIT_REASONS 0x000006B0 >  #define MSR_RING_PERF_LIMIT_REASONS 0x000006B1 >   > -/* Config TDP MSRs */ > -#define MSR_CONFIG_TDP_NOMINAL 0x00000648 > -#define MSR_CONFIG_TDP_LEVEL1 0x00000649 > -#define MSR_CONFIG_TDP_LEVEL2 0x0000064A > -#define MSR_CONFIG_TDP_CONTROL 0x0000064B > -#define MSR_TURBO_ACTIVATION_RATIO 0x0000064C > - >  /* Hardware P state interface */ >  #define MSR_PPERF 0x0000064e >  #define MSR_PERF_LIMIT_REASONS 0x0000064f