Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755407AbcC1WWI (ORCPT ); Mon, 28 Mar 2016 18:22:08 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:53381 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752523AbcC1WWE convert rfc822-to-8bit (ORCPT ); Mon, 28 Mar 2016 18:22:04 -0400 Subject: Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block Mime-Version: 1.0 (Mac OS X Mail 9.2 \(3112\)) Content-Type: text/plain; charset=us-ascii From: Matthew McClintock In-Reply-To: <20160328215638.GA25221@roeck-us.net> Date: Mon, 28 Mar 2016 17:21:59 -0500 Cc: andy.gross@linaro.org, linux-arm-msm@vger.kernel.org, "qca-upstream.external" , Wim Van Sebroeck , "open list:WATCHDOG DEVICE DRIVERS" , open list Content-Transfer-Encoding: 8BIT Message-Id: <1942199A-A10C-4934-A194-0955EA1D40CA@codeaurora.org> References: <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org> <1458770712-10880-8-git-send-email-mmcclint@codeaurora.org> <20160325162326.GA25767@roeck-us.net> <20160328181356.GA29820@roeck-us.net> <938942F3-D0ED-4BCA-9B6A-EF716A101E0C@codeaurora.org> <20160328215638.GA25221@roeck-us.net> To: Guenter Roeck X-Mailer: Apple Mail (2.3112) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 729 Lines: 21 On Mar 28, 2016, at 4:56 PM, Guenter Roeck wrote: > >> So taken from the timer offset 0x0208A000 I just have a generic counter register CPU0_APCS_GPT0_CNT at 0x8 >> >> What doc are you looking at? >> > "Qualcomm Snapdragon 600 Processor APQ8064 Hardware Register Description" > > It is available for download from the Qualcomm web site. > > See chapter 12.10.3, "Watchdog timer registers". The register block is at > 0x28882000. Registers are almost the same, except for the offset and the > definition of the bits in the enable register. > > LPASS is "Low Power Audio Subsystem". Maybe it has its own watchdog. This block is here: 11.15 KPSS CPU0 Timer Registers (0x0208A000 CPU0_APCS_TMR_BASE) -M