Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755515AbcC2AYw (ORCPT ); Mon, 28 Mar 2016 20:24:52 -0400 Received: from mail-am1on0073.outbound.protection.outlook.com ([157.56.112.73]:37024 "EHLO emea01-am1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752107AbcC2AYu convert rfc822-to-8bit (ORCPT ); Mon, 28 Mar 2016 20:24:50 -0400 From: Peter Chen To: Stefan Agner , Peter Chen CC: Sanchayan Maity , "linux-usb@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "ivan.ivanov@linaro.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "shawnguo@kernel.org" , "marcel@ziswiler.com" Subject: RE: [RFC PATCH 0/4] Implement USB device/host switch for Vybrid Thread-Topic: [RFC PATCH 0/4] Implement USB device/host switch for Vybrid Thread-Index: AQHRfpbZAapanA/FP0SKak35j46ZtJ9p1iGAgAU5joCAAJV5QA== Date: Tue, 29 Mar 2016 00:24:46 +0000 Message-ID: References: <20160325074051.GB22398@peterchendt> <3c2e72efc8cae93ff31be1b44f9a02b3@agner.ch> In-Reply-To: <3c2e72efc8cae93ff31be1b44f9a02b3@agner.ch> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: agner.ch; dkim=none (message not signed) header.d=none;agner.ch; dmarc=none action=none header.from=nxp.com; x-originating-ip: [58.33.225.112] x-ms-office365-filtering-correlation-id: af0442b4-7e32-42b3-32de-08d357688835 x-microsoft-exchange-diagnostics: 1;HE1PR04MB1449;5:3hcpxpr+x0mavLlaDpBwTynSPY+5Dcrj1d26/z+W/U+yXGSpVswKTi0JsT0x2eK5lQjfr2sORgnfz/gtE9w9gIqqRIcxZjoKsh3B+en8zfI4u6Fb0n4fKbpBe8fR8xuDAPu7gjTigU9+K0g/McunjQ==;24:XP3LFiAM6eGdT2xk27rUGRftpQ/1hcVnM/dOfBfFBGIaFXATOvUwfw2Fk1Zwze9LltWtN44iAdOXsWObUsYNfyFzOfN4za207UD9xvMChwk= x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:HE1PR04MB1449; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(2401047)(8121501046)(5005006)(10201501046)(3002001);SRVR:HE1PR04MB1449;BCL:0;PCL:0;RULEID:;SRVR:HE1PR04MB1449; x-forefront-prvs: 0896BFCE6C x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(24454002)(377424004)(81166005)(2950100001)(102836003)(2900100001)(86362001)(1096002)(106116001)(11100500001)(1220700001)(122556002)(50986999)(54356999)(76576001)(76176999)(74316001)(33656002)(5003600100002)(10400500002)(586003)(92566002)(5004730100002)(189998001)(3660700001)(3846002)(5002640100001)(5001770100001)(66066001)(3280700002)(87936001)(5008740100001)(4326007)(2906002)(77096005)(217873001);DIR:OUT;SFP:1101;SCL:1;SRVR:HE1PR04MB1449;H:HE1PR04MB1450.eurprd04.prod.outlook.com;FPR:;SPF:None;MLV:sfv;LANG:en; spamdiagnosticoutput: 1:23 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Mar 2016 00:24:46.0431 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR04MB1449 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1706 Lines: 43 > > On 2016-03-25 00:40, Peter Chen wrote: > > On Tue, Mar 15, 2016 at 02:08:26PM +0530, Sanchayan Maity wrote: > >> Hello Peter, > >> > >> The existing usage of extcon in Chipidea driver relies on OTG > >> registers. In case of SoC with dual role device but not a true OTG > >> controller, this does not work. Such SoC's should specify the > >> existing CI_HDRC_DUAL_ROLE_NOT_OTG flag and do the role switch > >> without checking any of the OTG registers in my opinion. > >> This is the case for Vybrid which uses a Chipidea IP but does not > >> have a true 5 pin OTG implemented. > > > > Sorry to reply you late due to my new born baby. > > > > Are you sure Vybrid is NOT OTG core? Afaik, it is uses the same IP > > base with other Freescale SoCs, just the IP core is 2.40a. > > When working at device mode, can you read vbus status through OTGSC? > > And if there is an ID pin (input pin) for Vybrid? I mean SoC, not the > > board. > > I think the IP is actually OTG capable, the registers are there, but the signals > seem not to be available on the SoC package. That is also what the RM says... > > Quotes from the RM: > > "OTG controller should be treated as > Dual role controller that allows the > controller to act as either a Host or a > device with no support for HNP/SRP." > > And later, in Chapter 11.1: > > "The USB is not a true OTG. It can be configured by software to function either > as peripheral or as host. The ID pin, which is unique for OTG operation, is not > present in this implementation. There are no five pin interface. The user will > get four pin host/ device interface." > Get it, thanks. I am doing a patch for covering this case and vbus always-on case. Peter