Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757237AbcC2MXt (ORCPT ); Tue, 29 Mar 2016 08:23:49 -0400 Received: from eusmtp01.atmel.com ([212.144.249.242]:23971 "EHLO eusmtp01.atmel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757171AbcC2MXm (ORCPT ); Tue, 29 Mar 2016 08:23:42 -0400 From: Cyrille Pitchen To: , CC: , , , , , , , , , , Cyrille Pitchen Subject: [PATCH v4 0/2] mtd: spi-nor: add an alternative method to support memory > 16MiB Date: Tue, 29 Mar 2016 14:24:11 +0200 Message-ID: X-Mailer: git-send-email 1.8.2.2 MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2411 Lines: 68 Hi all, This patch was tested on a sama5d2 xplained board + Macronix mx25l25673g. It provides us with an alternative method to support SPI NOR memory above 16MiB (128Mib). Indeed the previous method (still default) makes the memory enter it's 4byte-address method. However this mode has some annoying side effects for early bootloarders: it changes the internal state of the memory hence when using regular (Fast) Read op codes (0x03, 0x0b, 0x6b, ...) the memory now expects 4byte addresses whereas some bootloaders still use these op codes with 3byte addresses. The new method translates the 3byte address op codes into their 4byte address version: 0x03 -> 0x13 Read 0x0b -> 0x0c Fast Read 0x6b -> 0x6c Fast Read 1-1-4 0x02 -> 0x12 Page Program 0xd8 -> 0xdc Sector Erase ... The internal state of the SPI NOR memory is left unchanged. However the 4byte address op codes are not supported by all memories. For instance Macronix mx25l25635e and mx25l25673g share the very same JEDEC ID (C22019) with no additional ext_id bytes to differentiate them. The 35e doesn't support the 4byte address op codes whereas the 73g does. So there is no mean for the software to discover at runtime whether the hardware supports these op codes. Hence this patch checks a new DT property, "m25p,4byte-opcoes", to select the proper method to deal with a >16MiB SPI NOR memory. Best regards, Cyrille ChangeLog: v3 -> v4: - rename "m25p,4byte-opcodes" DT property into "spi-nor-4byte-opcodes". - replace "can not" by "cannot" in DT binding documentation. v2 -> v3: - fix errors reported by kbuild test robot: replace SPINOR_OP_READ4.* op codes by SPINOR_OP_READ.*_4B in st_spi_fsm.c - rename QUAD_PP into PP_1_1_4 and QUAD_PP_MX into PP_1_4_4 v1 -> v2: - remove the Kconfig option and use the new "m25p,4byte-opcodes" DT property instead. Cyrille Pitchen (2): mtd: spi-nor: add an alternative method to support memory >16MiB doc: dt: mtd: add a DT property to enable the use of 4byte-address op codes .../devicetree/bindings/mtd/jedec,spi-nor.txt | 11 +++ drivers/mtd/devices/serial_flash_cmds.h | 7 -- drivers/mtd/devices/st_spi_fsm.c | 28 +++--- drivers/mtd/spi-nor/spi-nor.c | 100 ++++++++++++++++----- include/linux/mtd/spi-nor.h | 21 +++-- 5 files changed, 119 insertions(+), 48 deletions(-) -- 1.8.2.2