Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756654AbcC2OC3 (ORCPT ); Tue, 29 Mar 2016 10:02:29 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:19944 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750854AbcC2OC0 (ORCPT ); Tue, 29 Mar 2016 10:02:26 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 29 Mar 2016 07:01:11 -0700 Subject: Re: [PATCH 02/15] ARM: OMAP: Correct interrupt type for ARM TWD To: Tony Lindgren References: <1458224359-32665-1-git-send-email-jonathanh@nvidia.com> <1458224359-32665-3-git-send-email-jonathanh@nvidia.com> <56EC2191.2060800@ti.com> CC: Grygorii Strashko , Thomas Gleixner , Jason Cooper , Marc Zyngier , =?UTF-8?Q?Beno=c3=aet_Cousson?= , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , "Stephen Warren" , Thierry Reding , Kevin Hilman , Geert Uytterhoeven , Lars-Peter Clausen , Linus Walleij , , , , From: Jon Hunter Message-ID: <56FA8AEA.3000208@nvidia.com> Date: Tue, 29 Mar 2016 15:02:18 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <56EC2191.2060800@ti.com> X-Originating-IP: [10.21.132.115] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1361 Lines: 33 Hi Tony, On 18/03/16 15:41, Grygorii Strashko wrote: > On 03/17/2016 04:19 PM, Jon Hunter wrote: >> The ARM TWD interrupt is a private peripheral interrupt (PPI) and per >> the ARM GIC documentation, whether the type for PPIs can be set is >> IMPLEMENTATION DEFINED. For OMAP4 devices the PPI type cannot be set and >> so when we attempt to set the type for the ARM TWD interrupt it fails. >> This has done unnoticed because it fails silently and because we cannot >> re-configure the type it has had no impact. Nevertheless fix the type >> for the TWD interrupt so that it matches the hardware configuration. >> >> Reported-by: Grygorii Strashko >> Signed-off-by: Jon Hunter >> >> --- >> >> Tony, Grygorii, >> Please note that I have not tested this. Can you test this series and >> see if you see any warnings on OMAP4? I am guessing that the configuration >> should be LEVEL and not EDGE. This was reported here: > > Tested-by: Grygorii Strashko > > Tested on PandaBoard. Without this patch I can see below warning: I think that you can pick up this fix independently of this series as it is something that has been broken for sometime and should be fixed. I included it here for completeness to highlight the issue but if you want to take it now, please go ahead. Cheers Jon