Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751628AbcCaHTU (ORCPT ); Thu, 31 Mar 2016 03:19:20 -0400 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:22367 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750849AbcCaHTT (ORCPT ); Thu, 31 Mar 2016 03:19:19 -0400 Date: Thu, 31 Mar 2016 15:15:01 +0800 From: Jisheng Zhang To: , , CC: , , Subject: Re: [PATCH] net: mvneta: remove useless RX descriptor prefetch Message-ID: <20160331151501.27fe34d5@xhacker> In-Reply-To: <20160331144537.20f04a8c@xhacker> References: <1459406190-2334-1-git-send-email-jszhang@marvell.com> <20160331144537.20f04a8c@xhacker> X-Mailer: Claws Mail 3.13.2 (GTK+ 2.24.30; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-03-31_02:,, signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1601100000 definitions=main-1603310099 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1776 Lines: 60 Hi all, On Thu, 31 Mar 2016 14:45:37 +0800 Jisheng Zhang wrote: > Hi, > > + linux arm kernel > > On Thu, 31 Mar 2016 14:36:30 +0800 Jisheng Zhang wrote: > > > The rx descriptors are allocated using dma_alloc_coherent, so prefetch > > doesn't really happen at all. > > This is for RFC, I'm sorry to send it without changing its title -- s/PATCH/RFC. > > I'm not sure whether there's any benefit to prefetch on space allocated from > dma_alloc_coherent. After more consideration, I think my patch is wrong. As for coherent platforms, the space allocated from dma_alloc_coherent is cacheable, so prefetch would definitely benefit us. As for noncoherent platforms, the space allocated from dma_alloc_coherent is uncacheable, but prefetch on arm/arm64 is implemented via. pld/prfm, the op would be nop if target address is uncacheable. So let's drop this patch. Thanks, Jisheng > > Thanks > > > > > Signed-off-by: Jisheng Zhang > > --- > > drivers/net/ethernet/marvell/mvneta.c | 1 - > > 1 file changed, 1 deletion(-) > > > > diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c > > index 5880871..6c09a27 100644 > > --- a/drivers/net/ethernet/marvell/mvneta.c > > +++ b/drivers/net/ethernet/marvell/mvneta.c > > @@ -757,7 +757,6 @@ mvneta_rxq_next_desc_get(struct mvneta_rx_queue *rxq) > > int rx_desc = rxq->next_desc_to_proc; > > > > rxq->next_desc_to_proc = MVNETA_QUEUE_NEXT_DESC(rxq, rx_desc); > > - prefetch(rxq->descs + rxq->next_desc_to_proc); > > return rxq->descs + rx_desc; > > } > > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel