Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753902AbcCaIl1 (ORCPT ); Thu, 31 Mar 2016 04:41:27 -0400 Received: from mail-oi0-f52.google.com ([209.85.218.52]:35319 "EHLO mail-oi0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751036AbcCaIlZ (ORCPT ); Thu, 31 Mar 2016 04:41:25 -0400 MIME-Version: 1.0 In-Reply-To: <1458752487-32767-1-git-send-email-alexander.stein@systec-electronic.com> References: <1458752487-32767-1-git-send-email-alexander.stein@systec-electronic.com> Date: Thu, 31 Mar 2016 10:41:24 +0200 Message-ID: Subject: Re: [PATCH 1/1] gpio: mcp23s08: Add support for level triggered interrupts From: Linus Walleij To: Alexander Stein Cc: Alexandre Courbot , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 862 Lines: 23 On Wed, Mar 23, 2016 at 6:01 PM, Alexander Stein wrote: > The interrupt for the corresponding pin is configured to trigger when the > pin state changes compared to a preconfigured state (Bit set in INTCON). > This state is set by setting/clearing the bit in DEFVAL. > In the interrupt handler we need also to check if the bit in INTCON is set > for level triggered interrupts. > > Signed-off-by: Alexander Stein Patch applied. I'm a bit concerned that you now support both edge and level trigged IRQs but this driver is using handle_simple_irq() in the gpiochip_irqchip_add() call. I guess it "just works" because the hardware will latch the edge IRQ and clear it when reading the status register. I guess you have tested it with both edge and level IRQs? Yours, Linus Walleij