Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756191AbcCaI6m (ORCPT ); Thu, 31 Mar 2016 04:58:42 -0400 Received: from webbox1416.server-home.net ([77.236.96.61]:43551 "EHLO webbox1416.server-home.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752419AbcCaI6i convert rfc822-to-8bit (ORCPT ); Thu, 31 Mar 2016 04:58:38 -0400 From: Alexander Stein To: Linus Walleij Cc: Alexandre Courbot , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 1/1] gpio: mcp23s08: Add support for level triggered interrupts Date: Thu, 31 Mar 2016 10:58:31 +0200 Message-ID: <5801670.ZsrEAbzXnC@ws-stein> User-Agent: KMail/4.14.10 (Linux/4.1.15-gentoo-r1; KDE/4.14.16; x86_64; ; ) In-Reply-To: References: <1458752487-32767-1-git-send-email-alexander.stein@systec-electronic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="utf-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1715 Lines: 41 On Thursday 31 March 2016 10:41:24, Linus Walleij wrote: > On Wed, Mar 23, 2016 at 6:01 PM, Alexander Stein > > wrote: > > The interrupt for the corresponding pin is configured to trigger when the > > pin state changes compared to a preconfigured state (Bit set in INTCON). > > This state is set by setting/clearing the bit in DEFVAL. > > In the interrupt handler we need also to check if the bit in INTCON is set > > for level triggered interrupts. > > > > Signed-off-by: Alexander Stein > > Patch applied. > > I'm a bit concerned that you now support both edge and level trigged > IRQs but this driver is using handle_simple_irq() in the > gpiochip_irqchip_add() call. I guess it "just works" because > the hardware will latch the edge IRQ and clear it when reading the > status register. >From the reference manual: > The INTCAP register captures the GPIO port value at > the time the interrupt occurred. The register is ‘read > only’ and is updated only when an interrupt occurs. The > register will remain unchanged until the interrupt is > cleared via a read of INTCAP or GPIO. So, i guess you're right. Although currently I don't know why handle_simple_irq would not work if this would not be the case. > I guess you have tested it with both edge and level IRQs? Yep, I have buttons and a PCA9555 added to MCP23S17. Buttons are gpio-keys, so rising and falling edge interrupts and PCA9555 uses low level interrupts. See this excerpt from /proc/interrupts: 79: 0 2 gpio-mcp23xxx 8 Edge Digital In 0 84: 0 4 gpio-mcp23xxx 13 Level 0-0024 Best regards, Alexander