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X-MS-Exchange-CrossTenant-Id: fbd72e03-d4a5-4110-adce-614d51f2077a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fbd72e03-d4a5-4110-adce-614d51f2077a;Ip=[66.35.236.236];Helo=[sj-itexedge04.altera.priv.altera.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR0301MB1296 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 930 Lines: 22 From: Thor Thayer This series of patches adds the Arria10 OCRAM EDAC support Thor Thayer (7): EDAC, altera: New file operations for Arria10 ECC modules EDAC, altera: Add register offset for ECC Enable EDAC, altera: Make OCRAM ECC dependency check generic Documentation: dt: socfpga: Add Altera Arria10 OCRAM binding EDAC, altera: Addition of Arria10 OCRAM ECC ARM: socfpga: Enable Arria10 OCRAM ECC on startup ARM: dts: Add Altera Arria10 OCRAM EDAC devicetree entry .../bindings/arm/altera/socfpga-eccmgr.txt | 10 ++ arch/arm/boot/dts/socfpga_arria10.dtsi | 5 + arch/arm/mach-socfpga/ocram.c | 128 ++++++++++++++++++++ drivers/edac/altera_edac.c | 127 +++++++++++++++---- drivers/edac/altera_edac.h | 37 ++++++ 5 files changed, 284 insertions(+), 23 deletions(-) -- 1.7.9.5