Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752994AbcDBJa1 (ORCPT ); Sat, 2 Apr 2016 05:30:27 -0400 Received: from mail-pf0-f177.google.com ([209.85.192.177]:33118 "EHLO mail-pf0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752465AbcDBJaY (ORCPT ); Sat, 2 Apr 2016 05:30:24 -0400 From: Guodong Xu To: xuwei5@hisilicon.com, mark.rutland@arm.com, robh@kernel.org, grant.likely@secretlab.ca, linus.walleij@linaro.org, arnd.bergmann@linaro.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kong.kongxinwei@hisilicon.com, Leo Yan Subject: [PATCH v2 01/16] arm64: dts: Reserve memory regions for hi6220 Date: Sat, 2 Apr 2016 17:29:28 +0800 Message-Id: <1459589383-16914-2-git-send-email-guodong.xu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459589383-16914-1-git-send-email-guodong.xu@linaro.org> References: <1459589383-16914-1-git-send-email-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1611 Lines: 55 From: Leo Yan On Hi6220, below memory regions in DDR have specific purpose: 0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime; 0x06df,f000 - 0x06df,ffff: For mailbox message data; 0x0740,f000 - 0x0740,ffff: For MCU firmware's section; 0x3e00,0000 - 0x3fff,ffff: For OP-TEE. This patch reserves these memory regions in DT. Signed-off-by: Leo Yan Signed-off-by: Wei Xu --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index 8185251..17bd793 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -7,9 +7,6 @@ /dts-v1/; -/*Reserved 1MB memory for MCU*/ -/memreserve/ 0x05e00000 0x00100000; - #include "hi6220.dtsi" / { @@ -27,9 +24,20 @@ stdout-path = "serial3:115200n8"; }; + /* + * Reserve below regions from memory node: + * + * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using + * 0x06df,f000 - 0x06df,ffff: Mailbox message data + * 0x0740,f000 - 0x0740,ffff: MCU firmware section + * 0x3e00,0000 - 0x3fff,ffff: OP-TEE + */ memory@0 { device_type = "memory"; - reg = <0x0 0x0 0x0 0x40000000>; + reg = <0x00000000 0x00000000 0x00000000 0x05e00000>, + <0x00000000 0x05f00000 0x00000000 0x00eff000>, + <0x00000000 0x06e00000 0x00000000 0x0060f000>, + <0x00000000 0x07410000 0x00000000 0x36bf0000>; }; }; -- 1.9.1