Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754440AbcDDFQa (ORCPT ); Mon, 4 Apr 2016 01:16:30 -0400 Received: from mail.kernel.org ([198.145.29.136]:50020 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754396AbcDDFQ1 (ORCPT ); Mon, 4 Apr 2016 01:16:27 -0400 Date: Mon, 4 Apr 2016 00:16:21 -0500 From: Rob Herring To: Neil Armstrong Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 2/2] dt-bindings: Add Oxford Semiconductor OXNAS pinctrl and gpio bindings Message-ID: <20160404051621.GM17806@rob-hp-laptop> References: <1459689969-5326-1-git-send-email-narmstrong@baylibre.com> <1459689969-5326-3-git-send-email-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1459689969-5326-3-git-send-email-narmstrong@baylibre.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2414 Lines: 68 On Sun, Apr 03, 2016 at 03:26:09PM +0200, Neil Armstrong wrote: > Add pinctrl and gpio DT bindings for Oxford Semiconductor OXNAS SoC Family. > This version supports the ARM926EJ-S based OX810SE SoC with 34 IO pins. > > Signed-off-by: Neil Armstrong > --- > .../devicetree/bindings/gpio/gpio_oxnas.txt | 43 ++++++++++++++++ > .../devicetree/bindings/pinctrl/oxnas,pinctrl.txt | 57 ++++++++++++++++++++++ > 2 files changed, 100 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpio/gpio_oxnas.txt > create mode 100644 Documentation/devicetree/bindings/pinctrl/oxnas,pinctrl.txt > > diff --git a/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt b/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt > new file mode 100644 > index 0000000..ddd3de9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/gpio_oxnas.txt > @@ -0,0 +1,43 @@ > +* Oxford Semiconductor OXNAS SoC GPIO Controller > + > +Required properties: > + - compatible: "oxsemi,ox810se-gpio" > + - reg: Base address and length for the device. > + - interrupts: The port interrupt shared by all pins. > + - gpio-controller: Marks the port as GPIO controller. > + - #gpio-cells: Two. The first cell is the pin number and > + the second cell is used to specify the gpio polarity as defined in > + defined in : > + 0 = GPIO_ACTIVE_HIGH > + 1 = GPIO_ACTIVE_LOW > + - interrupt-controller: Marks the device node as an interrupt controller. > + - #interrupt-cells: Two. The first cell is the GPIO number and second cell > + is used to specify the trigger type as defined in > + : > + IRQ_TYPE_EDGE_RISING > + IRQ_TYPE_EDGE_FALLING > + IRQ_TYPE_EDGE_BOTH > + - gpio-ranges: Interaction with the PINCTRL subsystem. This should say something about what is a valid value. Think how do you validate the example? > + > +Example: > + > +gpio0: gpio@0 { > + compatible = "oxsemi,ox810se-gpio"; > + reg = <0x000000 0x100000>; > + interrupts = <21>; > + #gpio-cells = <2>; > + gpio-controller; > + interrupt-controller; > + #interrupt-cells = <2>; > + gpio-ranges = <&pinctrl 0 0 32>; > +}; > + > +keys { > + ... > + > + button@sw1 { @sw1 is not a unit-address. Perhaps "esc-button" or just "esc" instead. > + label = "ESC"; > + linux,code = <1>; > + gpios = <&gpio0 12 0>; > + }; > +};