Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760796AbcDEWLc (ORCPT ); Tue, 5 Apr 2016 18:11:32 -0400 Received: from mail-bl2on0070.outbound.protection.outlook.com ([65.55.169.70]:15360 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1760515AbcDEWL2 (ORCPT ); Tue, 5 Apr 2016 18:11:28 -0400 Authentication-Results: arndb.de; dkim=none (message not signed) header.d=none;arndb.de; dmarc=none action=none header.from=caviumnetworks.com; From: Yury Norov To: , , , CC: , , , , , , , , , , , , , , , , Andrew Pinski , Andrew Pinski , Philipp Tomsich Subject: [PATCH 11/25] arm64: change some CONFIG_COMPAT over to use CONFIG_AARCH32_EL0 instead Date: Wed, 6 Apr 2016 01:08:33 +0300 Message-ID: <1459894127-17698-12-git-send-email-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1459894127-17698-1-git-send-email-ynorov@caviumnetworks.com> References: <1459894127-17698-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [95.143.213.121] X-ClientProxiedBy: AM2PR03CA0025.eurprd03.prod.outlook.com (10.160.207.35) To DM2PR07MB621.namprd07.prod.outlook.com (10.141.177.140) X-MS-Office365-Filtering-Correlation-Id: d0ed4333-2456-4078-a23e-08d35d9f39ef X-Microsoft-Exchange-Diagnostics: 1;DM2PR07MB621;2:VBQwioAKhl/7I6rvBzCswQET/qxoMcsowW2NpfKrKYTagSOYBoujbr+35+RqpXw32s2HYnrAaapbZtlBZdI88lSjt18Jrmy5Xu00gqHJvA7ngstuN5uokFa8b3aVHIUubASXCTZHbkMTOgwyTlyOA9CtQUXgU9CXD+HIViGn+8HxEuUPqV2Oacun4Dz0NNx3;3:1g1SRsc+M5ijv3NXvaqetx4/BDJbHjPpOO2OzYDRM+5P/2GQaJLKU5Bi+/8brZ7n1sOJgxyTJvgl3/fZyh/z/HVNqRdEZFz0SVt2BESAjvhk8kJyAHjaMIblq5QkcLDa;25:yDMjsdmUnUG5vhJi0A2uHYZ5kfkWySAnWiym/2g6yP5hSElxN+JQCmharDnW1SAAm+L2bwf1UA/mFzS+khUXn5x3mYRQFVbtWOODzUBo7+8bZ9nqmmfYLdcnexgjJf1PZWapAE9Cp6+O6VVnwQlOJTWrekXKIyedqvSEGVig+OeQqQ1bXRoVK4FXYwNWBtTkD7QWhCrd5v91ckIfca16g8bNPxljGycnDYDB2zZPDsY3gqpeEHiYGniy3x3gtlTOboZ9/GGH2VQSD6op6mHo5DAZF7r2pyhznfpml5evTE3Hh8vNHiY6UTR4vP/3p5lOG+udIXmbLwjFllB+jCHDAGuQFxIkg3dFMMVwaq10Rqc= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:DM2PR07MB621; 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X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1;DM2PR07MB621;23:PlRyf5hNIuN8KYb+WoNQUspRlgadGSszB8nwbFqtYJ?= =?us-ascii?Q?GgXaVwpUVm4IfPzWPD5eCdleSPIMy/Hn6FkmMejvOAZaeprZDkmTx48GWAgZ?= =?us-ascii?Q?PfYxapkIE1ajkxLwpaTBGjO4/x3fNfFyz/uJiZuNvI7qkPG0btRtDnVnqE6T?= =?us-ascii?Q?2uK1Uo3bvGVLlOhtTypc6L7F6DfIhOJ8FdqXKGCQv8cYpr3nYUYvKbpXCvTb?= =?us-ascii?Q?4IDGiIuYJ6GLFIsvnI+0n35u8KNE/qJ3P2xjOwF4sjqf4F7BwtOus/8TfA8i?= =?us-ascii?Q?Ye5nYWwHpB3bCKzWkiLdNHi6s2Pr7pn/oGh+/MeWJ47FD/qkK0wB5Dw8vD2m?= =?us-ascii?Q?N3FW71+pIrgYKF/IN21DNyXQ4W0TTzUdLdsw+4C5Ba5oemYYutSFRLid4p7S?= =?us-ascii?Q?ymgiNmvwtqGFhD7J2wPcklgUcHrWcR/bkYIcpBQnDRXh98LJmJRYIdFCZSiy?= =?us-ascii?Q?NXEiL557nqdzvEhPge/Kn4/EDS2XunJmxHqM5E+R/V6bPP0YCEn6C02amYct?= =?us-ascii?Q?UYIQLHukThfnTzrg20mjXwYZ8wLeJiSF93AFLb1Z7wpUVX5CLE18uv/nhtUM?= =?us-ascii?Q?t9K7TYp/SbWBg8mlHhM0EsMEUqIt4RFdC8s+s49pq3xDH9mP9Ssv6KAUeaqg?= =?us-ascii?Q?kt+Lu1BgkXiWT0Ze54pYmD9uCk723EbSUERG7kOHOPRz+mL5olwzst5kicth?= =?us-ascii?Q?5WjX3kAUVRbwFdx3f4B2OCma7A7tbCraR/055QAEdguwFLU3j7HZ6HXfLnUS?= =?us-ascii?Q?GU/Nu74wvo+c0IMs2Th5KDPGN9BnalClUlLhkkaDUnHIU0k8e1KWZHY2W8bG?= =?us-ascii?Q?DVV9/16G4cRxEK9G2Ug+yUw480Dc/W3NUx0Dg+9pBz+pN2SrQ3Ov9hOi6RjH?= =?us-ascii?Q?MEOo7ybUR3JCLVCb293c2p/RxagSw1hARJHKpbXLbJ203nP1sZQGc9yqEM/M?= =?us-ascii?Q?thG/4Qe/S4Nbaa96RFKoHCx465UMXcicIkn8QLhDqqetzzwJfNI01dFLfXAA?= =?us-ascii?Q?Mg1VsYTkx74qFIRp9i7mkQ?= X-Microsoft-Exchange-Diagnostics: 1;DM2PR07MB621;5:EbQKt56DGqVM0jxrlefXuK+N92gIQjQEyGmnF0ulPkOiOFFsJ8tYQyFvuidFRdNOKhn48T8QA+34bg2gIpgXma1wDre/SvPZylUn7Lm+8qsBIOms+vI+fQ6eOAgiYqn6MXJmXJKTkqjgWx4VJKHjjA==;24:UbP0i0Y3jIFXK09rdXnzO/8vdo1FOQzIj9MpNUOOWu4PwrIgu+UTBPuWEya8D1iiE9Gc2LxQbBSfuquejVoKWFHgHdLqYim5sEbiKkTFUY0= SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Apr 2016 22:11:23.9123 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR07MB621 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 12517 Lines: 359 From: Andrew Pinski Signed-off-by: Andrew Pinski Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Yury Norov Reviewed-by: David Daney --- arch/arm64/include/asm/fpsimd.h | 2 +- arch/arm64/include/asm/hwcap.h | 4 ++-- arch/arm64/include/asm/processor.h | 6 +++--- arch/arm64/include/asm/ptrace.h | 2 +- arch/arm64/include/asm/signal32.h | 6 ++++-- arch/arm64/include/asm/unistd.h | 2 +- arch/arm64/kernel/Makefile | 2 +- arch/arm64/kernel/asm-offsets.c | 2 +- arch/arm64/kernel/cpufeature.c | 8 ++++---- arch/arm64/kernel/cpuinfo.c | 4 ++-- arch/arm64/kernel/entry.S | 6 +++--- arch/arm64/kernel/head.S | 2 +- arch/arm64/kernel/ptrace.c | 8 ++++---- arch/arm64/kernel/traps.c | 2 +- arch/arm64/kernel/vdso.c | 4 ++-- drivers/clocksource/arm_arch_timer.c | 2 +- 16 files changed, 32 insertions(+), 30 deletions(-) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index 50f559f..63b19f1 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -52,7 +52,7 @@ struct fpsimd_partial_state { }; -#if defined(__KERNEL__) && defined(CONFIG_COMPAT) +#if defined(__KERNEL__) && defined(CONFIG_AARCH32_EL0) /* Masks for extracting the FPSR and FPCR from the FPSCR */ #define VFP_FPSCR_STAT_MASK 0xf800009f #define VFP_FPSCR_CTRL_MASK 0x07f79f00 diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index 400b80b..2c7fc5d 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -46,7 +46,7 @@ */ #define ELF_HWCAP (elf_hwcap) -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define COMPAT_ELF_HWCAP (compat_elf_hwcap) #define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2) extern unsigned int compat_elf_hwcap, compat_elf_hwcap2; @@ -54,7 +54,7 @@ extern unsigned int compat_elf_hwcap, compat_elf_hwcap2; enum { CAP_HWCAP = 1, -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 CAP_COMPAT_HWCAP, CAP_COMPAT_HWCAP2, #endif diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index cef1cf3..5bbdbb4 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -81,7 +81,7 @@ struct cpu_context { struct thread_struct { struct cpu_context cpu_context; /* cpu context */ unsigned long tp_value; /* TLS register */ -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 unsigned long tp2_value; #endif struct fpsimd_state fpsimd_state; @@ -90,7 +90,7 @@ struct thread_struct { struct debug_info debug; /* debugging */ }; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define task_user_tls(t) \ ({ \ unsigned long *__tls; \ @@ -121,7 +121,7 @@ static inline void start_thread(struct pt_regs *regs, unsigned long pc, regs->sp = sp; } -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) { diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h index a307eb6..4c730c3 100644 --- a/arch/arm64/include/asm/ptrace.h +++ b/arch/arm64/include/asm/ptrace.h @@ -121,7 +121,7 @@ struct pt_regs { #define arch_has_single_step() (1) -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define compat_thumb_mode(regs) \ (((regs)->pstate & COMPAT_PSR_T_BIT)) #else diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h index eeaa975..e68fcce 100644 --- a/arch/arm64/include/asm/signal32.h +++ b/arch/arm64/include/asm/signal32.h @@ -17,7 +17,9 @@ #define __ASM_SIGNAL32_H #ifdef __KERNEL__ -#ifdef CONFIG_COMPAT + +#ifdef CONFIG_AARCH32_EL0 + #include #define AARCH32_KERN_SIGRET_CODE_OFFSET 0x500 @@ -47,6 +49,6 @@ static inline int compat_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t static inline void compat_setup_restart_syscall(struct pt_regs *regs) { } -#endif /* CONFIG_COMPAT */ +#endif /* CONFIG_AARCH32_EL0 */ #endif /* __KERNEL__ */ #endif /* __ASM_SIGNAL32_H */ diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h index 41e58fe..2971dea 100644 --- a/arch/arm64/include/asm/unistd.h +++ b/arch/arm64/include/asm/unistd.h @@ -13,7 +13,7 @@ * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define __ARCH_WANT_COMPAT_SYS_GETDENTS64 #define __ARCH_WANT_COMPAT_STAT64 #define __ARCH_WANT_SYS_GETHOSTNAME diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index 3793003..75dd250 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -25,7 +25,7 @@ OBJCOPYFLAGS := --prefix-symbols=__efistub_ $(obj)/%.stub.o: $(obj)/%.o FORCE $(call if_changed,objcopy) -arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \ +arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \ sys_compat.o entry32.o \ ../../arm/kernel/opcodes.o arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c index 3ae6b31..e229525 100644 --- a/arch/arm64/kernel/asm-offsets.c +++ b/arch/arm64/kernel/asm-offsets.c @@ -52,7 +52,7 @@ int main(void) DEFINE(S_X7, offsetof(struct pt_regs, regs[7])); DEFINE(S_LR, offsetof(struct pt_regs, regs[30])); DEFINE(S_SP, offsetof(struct pt_regs, sp)); -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp)); #endif DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate)); diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 943f514..6f77412 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -32,7 +32,7 @@ unsigned long elf_hwcap __read_mostly; EXPORT_SYMBOL_GPL(elf_hwcap); -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define COMPAT_ELF_HWCAP_DEFAULT \ (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\ COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\ @@ -751,7 +751,7 @@ static const struct arm64_cpu_capabilities arm64_hwcaps[] = { HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_FP_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, HWCAP_FPHP), HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_ASIMD_SHIFT, FTR_SIGNED, 0, CAP_HWCAP, HWCAP_ASIMD), HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_ASIMD_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, HWCAP_ASIMDHP), -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_SHA1_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA1), @@ -767,7 +767,7 @@ static void __init cap_set_hwcap(const struct arm64_cpu_capabilities *cap) case CAP_HWCAP: elf_hwcap |= cap->hwcap; break; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 case CAP_COMPAT_HWCAP: compat_elf_hwcap |= (u32)cap->hwcap; break; @@ -790,7 +790,7 @@ static bool __maybe_unused cpus_have_hwcap(const struct arm64_cpu_capabilities * case CAP_HWCAP: rc = (elf_hwcap & cap->hwcap) != 0; break; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 case CAP_COMPAT_HWCAP: rc = (compat_elf_hwcap & (u32)cap->hwcap) != 0; break; diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 84c8684..32fb4f3 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -127,7 +127,7 @@ static int c_show(struct seq_file *m, void *v) */ seq_puts(m, "Features\t:"); if (personality(current->personality) == PER_LINUX32) { -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 for (j = 0; compat_hwcap_str[j]; j++) if (compat_elf_hwcap & (1 << j)) seq_printf(m, " %s", compat_hwcap_str[j]); @@ -135,7 +135,7 @@ static int c_show(struct seq_file *m, void *v) for (j = 0; compat_hwcap2_str[j]; j++) if (compat_elf_hwcap2 & (1 << j)) seq_printf(m, " %s", compat_hwcap2_str[j]); -#endif /* CONFIG_COMPAT */ +#endif /* CONFIG_AARCH32_EL0 */ } else { for (j = 0; hwcap_str[j]; j++) if (elf_hwcap & (1 << j)) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 12e8d2b..cf4d1ae 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -260,7 +260,7 @@ ENTRY(vectors) ventry el0_fiq_invalid // FIQ 64-bit EL0 ventry el0_error_invalid // Error 64-bit EL0 -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 ventry el0_sync_compat // Synchronous 32-bit EL0 ventry el0_irq_compat // IRQ 32-bit EL0 ventry el0_fiq_invalid_compat // FIQ 32-bit EL0 @@ -300,7 +300,7 @@ el0_error_invalid: inv_entry 0, BAD_ERROR ENDPROC(el0_error_invalid) -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 el0_fiq_invalid_compat: inv_entry 0, BAD_FIQ, 32 ENDPROC(el0_fiq_invalid_compat) @@ -462,7 +462,7 @@ el0_sync: b.ge el0_dbg b el0_inv -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 .align 6 el0_sync_compat: kernel_entry 0, 32 diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 4203d5f..e407b08 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -598,7 +598,7 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems mov x0, #0x33ff msr cptr_el2, x0 // Disable copro. traps to EL2 -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 msr hstr_el2, xzr // Disable CP15 traps to EL2 #endif diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 3f6cd5c..aa79e81 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -82,7 +82,7 @@ static void ptrace_hbptriggered(struct perf_event *bp, .si_addr = (void __user *)(bkpt->trigger), }; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 int i; if (!is_compat_task()) @@ -657,7 +657,7 @@ static const struct user_regset_view user_aarch64_view = { .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets) }; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #include enum compat_regset { @@ -1192,11 +1192,11 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, return ret; } -#endif /* CONFIG_COMPAT */ +#endif /* CONFIG_AARCH32_EL0 */ const struct user_regset_view *task_user_regset_view(struct task_struct *task) { -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 /* * Core dumping of 32-bit tasks or compat ptrace requests must use the * user_aarch32_view compatible with arm32. Native ptrace requests on diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index c539208..cdab14e 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -403,7 +403,7 @@ long compat_arm_syscall(struct pt_regs *regs); asmlinkage long do_ni_syscall(struct pt_regs *regs) { -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 long ret; if (is_compat_task()) { ret = compat_arm_syscall(regs); diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c index 97bc68f..26352a6 100644 --- a/arch/arm64/kernel/vdso.c +++ b/arch/arm64/kernel/vdso.c @@ -49,7 +49,7 @@ static union { } vdso_data_store __page_aligned_data; struct vdso_data *vdso_data = &vdso_data_store.data; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 /* * Create and map the vectors page for AArch32 tasks. */ @@ -107,7 +107,7 @@ int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp) return PTR_ERR_OR_ZERO(ret); } -#endif /* CONFIG_COMPAT */ +#endif /* CONFIG_AARCH32_EL0 */ static struct vm_special_mapping vdso_spec[2]; diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 5152b38..d5e699d 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -321,7 +321,7 @@ static void arch_timer_evtstrm_enable(int divider) | ARCH_TIMER_VIRT_EVT_EN; arch_timer_set_cntkctl(cntkctl); elf_hwcap |= HWCAP_EVTSTRM; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM; #endif } -- 2.5.0