Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760179AbcDEW5X (ORCPT ); Tue, 5 Apr 2016 18:57:23 -0400 Received: from mail-wm0-f51.google.com ([74.125.82.51]:34310 "EHLO mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760002AbcDEW5Q (ORCPT ); Tue, 5 Apr 2016 18:57:16 -0400 From: Stanimir Varbanov To: Rob Herring , Mark Rutland , Vinod Koul , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, Sinan Kaya , Pramod Gurav , Stanimir Varbanov Subject: [PATCH v2 2/5] dmaengine: qcom: bam_dma: clear BAM interrupt only if it is rised Date: Wed, 6 Apr 2016 01:56:19 +0300 Message-Id: <1459896982-30171-3-git-send-email-stanimir.varbanov@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459896982-30171-1-git-send-email-stanimir.varbanov@linaro.org> References: <1459896982-30171-1-git-send-email-stanimir.varbanov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1251 Lines: 40 Currently we write BAM_IRQ_CLR register with zero even when no BAM_IRQ occured. This write has some bad side effects when the BAM instance is for the crypto engine. In case of crypto engine some of the BAM registers are xPU protected and they cannot be controlled by the driver. Signed-off-by: Stanimir Varbanov Reviewed-by: Andy Gross --- drivers/dma/qcom/bam_dma.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c index a486bc0f82e0..789d5f836bf7 100644 --- a/drivers/dma/qcom/bam_dma.c +++ b/drivers/dma/qcom/bam_dma.c @@ -801,13 +801,17 @@ static irqreturn_t bam_dma_irq(int irq, void *data) if (srcs & P_IRQ) tasklet_schedule(&bdev->task); - if (srcs & BAM_IRQ) + if (srcs & BAM_IRQ) { clr_mask = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_STTS)); - /* don't allow reorder of the various accesses to the BAM registers */ - mb(); + /* + * don't allow reorder of the various accesses to the BAM + * registers + */ + mb(); - writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR)); + writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR)); + } return IRQ_HANDLED; } -- 1.9.1