Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760888AbcDFFIp (ORCPT ); Wed, 6 Apr 2016 01:08:45 -0400 Received: from mail-cys01nam02on0087.outbound.protection.outlook.com ([104.47.37.87]:64132 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752195AbcDFFIl convert rfc822-to-8bit (ORCPT ); Wed, 6 Apr 2016 01:08:41 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Appana Durga Kedareswara Rao To: Vinod Koul CC: "dan.j.williams@intel.com" , Michal Simek , Soren Brinkmann , "moritz.fischer@ettus.com" , "laurent.pinchart@ideasonboard.com" , "luis@debethencourt.com" , Srikanth Vemula , Anirudha Sarangi , "dmaengine@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v3 2/2] dmaengine: vdma: Fix race condition in Non-SG mode Thread-Topic: [PATCH v3 2/2] dmaengine: vdma: Fix race condition in Non-SG mode Thread-Index: AQHRhncNgKNXi5PypU2a2ODRBw1KB597eCCAgAD9LBA= Date: Wed, 6 Apr 2016 05:08:33 +0000 Message-ID: References: <1458897399-3939-1-git-send-email-appanad@xilinx.com> <20160405215326.GB11586@vkoul-mobl.iind.intel.com> In-Reply-To: <20160405215326.GB11586@vkoul-mobl.iind.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.23.95.64] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22240.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(199003)(24454002)(189002)(377454003)(102836003)(6116002)(1096002)(6806005)(5250100002)(81166005)(63266004)(11100500001)(1220700001)(15975445007)(586003)(55846006)(2906002)(87936001)(76176999)(50466002)(5008740100001)(50986999)(4326007)(92566002)(23726003)(46406003)(106466001)(19580405001)(54356999)(189998001)(86362001)(33656002)(2900100001)(47776003)(19580395003)(97756001)(110136002)(2950100001)(106116001)(5003600100002)(2920100001)(107986001);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1NAM02HT131;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;MLV:sfv;A:1;MX:1;LANG:en; X-MS-Office365-Filtering-Correlation-Id: ca4d0ecc-b5cd-4763-0241-08d35dd98397 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:CY1NAM02HT131; X-Microsoft-Antispam-PRVS: <3e8108b552554b8880a7a6a970cdae2a@CY1NAM02HT131.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(13017025)(13024025)(5005006)(13023025)(13015025)(13018025)(8121501046)(10201501046)(3002001);SRVR:CY1NAM02HT131;BCL:0;PCL:0;RULEID:;SRVR:CY1NAM02HT131; X-Forefront-PRVS: 0904004ECB X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Apr 2016 05:08:38.1057 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT131 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4330 Lines: 127 Hi Vinod, > -----Original Message----- > From: Vinod Koul [mailto:vinod.koul@intel.com] > Sent: Wednesday, April 06, 2016 3:23 AM > To: Appana Durga Kedareswara Rao > Cc: dan.j.williams@intel.com; Michal Simek ; Soren > Brinkmann ; Appana Durga Kedareswara Rao > ; moritz.fischer@ettus.com; > laurent.pinchart@ideasonboard.com; luis@debethencourt.com; Srikanth > Vemula ; Anirudha Sarangi ; > dmaengine@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org > Subject: Re: [PATCH v3 2/2] dmaengine: vdma: Fix race condition in Non-SG > mode > > On Fri, Mar 25, 2016 at 02:46:39PM +0530, Kedareswara rao Appana wrote: > > When VDMA is configured in Non-sg mode Users can queue descriptors > > greater than h/w configured frames. > > > > Current driver allows the user to queue descriptors upto h/w configured. > > Which is wrong for non-sg mode configuration. > > I see to have standalone patch 2, where is 1st patch? > > There seems to be an issue with other 6 patch series with threading broken and > few patches showing up standalone and not part of series > > Can you resend the whole thing please.. Ok Sure will resend both the patch series again.... Regards, Kedar. > > > > > This patch fixes this issue. > > > > Signed-off-by: Kedareswara rao Appana > > --- > > Changes for v3: > > ---> New patch. > > > > drivers/dma/xilinx/xilinx_vdma.c | 25 +++++++++++++++++++------ > > 1 file changed, 19 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/dma/xilinx/xilinx_vdma.c > > b/drivers/dma/xilinx/xilinx_vdma.c > > index abe915c..b873d98 100644 > > --- a/drivers/dma/xilinx/xilinx_vdma.c > > +++ b/drivers/dma/xilinx/xilinx_vdma.c > > @@ -209,6 +209,7 @@ struct xilinx_vdma_tx_descriptor { > > * @flush_on_fsync: Flush on Frame sync > > * @desc_pendingcount: Descriptor pending count > > * @ext_addr: Indicates 64 bit addressing is supported by dma channel > > + * @desc_submitcount: Descriptor h/w submitted count > > */ > > struct xilinx_vdma_chan { > > struct xilinx_vdma_device *xdev; > > @@ -233,6 +234,7 @@ struct xilinx_vdma_chan { > > bool flush_on_fsync; > > u32 desc_pendingcount; > > bool ext_addr; > > + u32 desc_submitcount; > > }; > > > > /** > > @@ -716,9 +718,10 @@ static void xilinx_vdma_start_transfer(struct > xilinx_vdma_chan *chan) > > struct xilinx_vdma_tx_segment *segment, *last = NULL; > > int i = 0; > > > > - list_for_each_entry(desc, &chan->pending_list, node) { > > - segment = list_first_entry(&desc->segments, > > - struct xilinx_vdma_tx_segment, > node); > > + if (chan->desc_submitcount < chan->num_frms) > > + i = chan->desc_submitcount; > > + > > + list_for_each_entry(segment, &desc->segments, node) { > > if (chan->ext_addr) > > vdma_desc_write_64(chan, > > > XILINX_VDMA_REG_START_ADDRESS_64(i++), > > @@ -742,8 +745,17 @@ static void xilinx_vdma_start_transfer(struct > xilinx_vdma_chan *chan) > > vdma_desc_write(chan, XILINX_VDMA_REG_VSIZE, last- > >hw.vsize); > > } > > > > - list_splice_tail_init(&chan->pending_list, &chan->active_list); > > - chan->desc_pendingcount = 0; > > + if (!chan->has_sg) { > > + list_del(&desc->node); > > + list_add_tail(&desc->node, &chan->active_list); > > + chan->desc_submitcount++; > > + chan->desc_pendingcount--; > > + if (chan->desc_submitcount == chan->num_frms) > > + chan->desc_submitcount = 0; > > + } else { > > + list_splice_tail_init(&chan->pending_list, &chan->active_list); > > + chan->desc_pendingcount = 0; > > + } > > } > > > > /** > > @@ -927,7 +939,8 @@ append: > > list_add_tail(&desc->node, &chan->pending_list); > > chan->desc_pendingcount++; > > > > - if (unlikely(chan->desc_pendingcount > chan->num_frms)) { > > + if (chan->has_sg && > > + unlikely(chan->desc_pendingcount > chan->num_frms)) { > > dev_dbg(chan->dev, "desc pendingcount is too high\n"); > > chan->desc_pendingcount = chan->num_frms; > > } > > -- > > 2.1.2 > > > > -- > > To unsubscribe from this list: send the line "unsubscribe dmaengine" > > in the body of a message to majordomo@vger.kernel.org More majordomo > > info at http://vger.kernel.org/majordomo-info.html > > -- > ~Vinod